( ESNUG 450 Item 4 ) --------------------------------------------- [01/25/06]

Subject: ( ESNUG 448 #1 ) Magma follow up on the Power Demo user questions

> I found the Magma Blast Power demo very impressive.  It reminded me
> of that Avanti PI/SI tool capabilities many years ago.  Depending on the
> functional requirements of the target device, especially with the PI & SI
> issues, Magma Blast Power looks like it could perform the job well.
>
>     - Don Gabriel
>       PDM Solutions Corp.


From: Arvind Narayanan <arvindn=usr domain=magma-da hot mom>

Hi John,

I'm a Product Specialist at Magma, responsible for our implementation tools,
specifically our power implementation & analysis tools.  I'd like to respond
to these questions by Don on Magma Blast Power in ESNUG 448 #1.

> 1. Are the SPICE models generated & verified from actual lab measurements?

Our SPICE models are built on a large number of technology-related parameters.
To get the value of these numbers one needs to make actual lab measurements.
This characterization or SPICE-versus-silicon correlation is needed to make
sure your SPICE models reflect the actual silicon.

Magma cell characterization uses the SPICE models from the fabs which have
undergone correlation using testchips with lots of test-devices and
test-structures.


> 2. Could in-process "markers" or indicators embedded in the RTL source code
>    predict power consumption to mitigate IR drops and other switching (i.e.
>    clock-gating) events?  Basically, sort of like a "branch-prediction"
>    algorithim for PI and SI?

At the RTL level currently we have the ability to handle clock gating, power
gating and voltage islands and also perform power analysis.  As a part of our
roadmap for Magma Blast Power we are looking at options that would help
automate power prediction in the RTL source code, which is user driven at
this point.


> 3. Can these changes (i.e. frequency scaling) which impacts overall
>    performance, be simulated and verified prior to submitting to the fab?

Magma Blast Power handles Dynamic Voltage Frequency scaling in our flow and
concurrent optimization is enabled using multimode/multicorner analysis
and optimization.  It is possible to see the impact on performance by running
power and timing analysis using our integrated engines at the given voltage
and frequency.

I would like to thank Don for his thoughtful comments and questions.

    - Arvind Narayanan
      Magma DA                                   Santa Clara, CA
Index    Next->Item








   
 Sign up for the DeepChip newsletter.
Email
 Read what EDA tool users really think.


Feedback About Wiretaps ESNUGs SIGN UP! Downloads Trip Reports Advertise

"Relax. This is a discussion. Anything said here is just one engineer's opinion. Email in your dissenting letter and it'll be published, too."
This Web Site Is Modified Every 2-3 Days
Copyright 1991-2024 John Cooley.  All Rights Reserved.
| Contact John Cooley | Webmaster | Legal | Feedback Form |

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)