( ESNUG 448 Item 7 ) -------------------------------------------- [11/11/05]
Subject: ( ESNUG 447 #5 ) We Didn't Try to Use Silicon Ensemble at 130 nm
> I don't know whether to laugh at or pity the good folks at ST in Longmont,
> for their old timing driven flow in SE. I mean they were trying to pass
> timing constraints thru SDF from DC!
>
> - Wasim Altaf
> Innotech Systems, Inc. Boston, MA
From: Raphael Bingert <raphael.bingert=user domain=st spot gone>
Hi John,
Wisam's observation makes a lot of sense if we're talking about implementing
a 130 nm chip with Silicon Ensemble -- but we're not. My methodology with
SE was at 250 nm. We started using PhysOpt at 180 nm. I forgot to mention
that in my original post.
- Raphael Bingert
STmicroelectronics Longmont, CO
Index
Next->Item
|
|
