( ESNUG 447 Item 3 ) -------------------------------------------- [09/26/05]

From: Igor Orlovsky <iorlovsky=user domain=topcon spot calm>
Subject: Uniquifying Repeated Subdesign Instances a Pain in Olde BuildGates

Hi all!

Please give me a clue on optimizing complex design in BuildGates.  I have
a design with large number of multiply instantiated subdesigns.  Each
subdesign is also hierarchical and contains several instances of another
subdesign.  I want to perform pre-layout synthesis and optimization, so
would like to keep repeated submodules as single Verilog modules without
uniquifying them.  However, I should set some timing constants inside the
repeated submodules along with set multicycle paths.  BuildGates prohibited
such references and needs to make all the mentioned instances unique
(do_uniquify_instantiate) as referenced objects are not-unique from its
point of view.  If such, I have to uniquify top-level instances (and clone
repeated modules in design) and also uniquify repeated internal instances
inside each top-level instances.

All this needs more memory and future optimization work.

For example, if I have 10 instances of subdesign A at the top level, I must

    do_uniquely_instantiate -hier {i1 i2 i3 i4 i5 i6 i7 i8 i9 i10}

If each A design contain 3 instances of B design, I also have to uniquify
each 3 instances in each 10 subdesigns to refer their internal variable

    do_uniquely_instantiate -hier {i1/i1 i1/i2 i1/i3}
    do_uniquely_instantiate -hier {i2/i1 i2/i2 i2/i3}
    .....
    do_uniquely_instantiate -hier {i10/i1 i10/i2 i10/i3}

Anyway, now I have too large design, needs more memory and optimization of
each new subdesign.  This process is more close to physical optimization,
and needs more computer resources than should be considered at the pre-
layout optimization stage.  This kind of design could be well-optimized
when applying top-level constraints ONLY and not need any uniquifying.
However when I need to refer any internal object (instance/pin/path) inside
repeated instanced I meet the above problems.

Is there any approach, avoiding uniquifying in Ambit BuildGates?

I am wonder if such problem exists in Synopsys Design Compler, too?

    - Igor Orlovsky
      Topcon Positioning Systems                 Livermore, CA
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