( ESNUG 443 Item 11 ) ------------------------------------------- [04/15/05]
Subject: ( SNUG 04 #6 ) More Users On FastScan, TetraMAX, Encounter Test
> We use DFT Compiler/TetraMAX. We've also used FastScan. FastScan is
> good. However, it is convenient to have TetraMAX pick up STIL files
> from DFT Compiler. TetraMAX doesn't seem to support Verilog-XL well,
> which is kind of awkward and surprising.
>
> - Haiming Jin of Intel
From: [ Chicken Man ]
Hi, John,
The 3rd part of any scan insertion/ATPG tool is defect diagnosis capability.
Scan diagnosis is an increasingly important tool for proto debug, yield
enhancement, reliability monitoring and customer returns. My experience
with diagnosis using Fastscan and TetraMAX is that the tools are very basic
and provide nearly identical capabilities. Little development activity
has occurred on either tool in this area. Cadence recently rolled out
Encounter Test. Cadence's tool seems to be a quantum leap above Mentor or
Synopsys when it comes to diagnosis. Anon please.
- [ Chicken Man ]
---- ---- ---- ---- ---- ---- ----
From: [ The Invisible Man ]
Hi, John,
We use Mentor's FastScan. The types of chips I work on are cores and
platforms with one or multiple cores. We typically use the latest version,
though sometimes we use older versions for repeatability for legacy
products. Some of FastScan's functionality useful to us are:
1. DC (stuck-at faults) and AC (At-speed test) ATPG (transition and
path-delay)
2. DRC checks -- helpful for finding scan functionality issues, timing
issues, etc.
3. DC scan diagnostics, for failure analysis
4. DFT Insight graphical trouble-shooting environment for DRC and
pattern debug
Mentor needs to improve their split-capture ATPG so that its performance
matches capture-handling-new/RAM-sequential ATPG.
FastScan's biggest strengths are:
1. Ability to detect DC and AC faults involving array primitives.
2. ATPG dynamic pattern compression, including the new Create Patterns
command. This reduces pattern and scan-load volume.
3. Pattern ordering. This enables us to use only the most productive
patterns for production test, and omit patterns that detect only a
few faults.
4. Various filtering and save pattern options. We can create good
samples of patterns, for preliminary Verilog verification. We can
save patterns in multiple useful formats, and we can save them in
groups with a specified maximum number of scan loads.
5. Ability to specify custom ATPG procedures, especially the new Named
Capture Procedures. These facilitate AC ATPG, and DC ATPG for faults
around CRAMs (array primitives).
I am happy with FastScan and have personally used it for almost 12 years.
- [ The Invisible Man ]
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