( ESNUG 443 Item 4 ) -------------------------------------------- [04/15/05]

Subject: ( ESNUG 442 #15 ) PrimePower Compatibility Issues with PrimeTime

> I've using PrimePower for power estimation of a chip.  The constraints
> file I'm giving to PrimePower has been generated from PrimeTime.  My
> problem is the constrants contains commands like create_generated_clock;
> which is not supported by PrimePower.
>
>   1) What should be done?  To use create_clock would mean foregoing
>      -source and -divide_by options.
>
>   2) What are aspects of constrains that effect power calculations?
>      Are aspects such as false paths and multicycle paths affecting
>      power calculations?
>
> Is there a good doc for power calculations/estimation on the web?
>
>     - Vishal Gera
>       STmicroelectronics


From: Rishi Chawla <rishi.chawla=user domain=synopsys spot gone>

Hello John,

This is a response to Vishal's questions on PrimePower compatibility with
PrimeTime.  As of the 2004.12 release, PrimePower supports the
create_generated_clock command.  This enhancement is documented in the
2004.12 release notes.

The main factors which affect power calculation are the transition times
and output load.  If you have a VCD file, you can define your own
conditions in PrimePower by using the set_input_transition and set_load
commands.  The delays are derived directly from the VCD.

If you do not have a VCD, you can specify set_input_delay constraints and
use PrimePower's new VectorFree analysis (available since 2004.06).  In
this case, PrimePower directly uses PrimeTime's signoff delay calculation
engine to determine the timing windows, so the accuracy is good.

Vishal also asked about details on how power calculation is done in
PrimePower.  In 2004.12, PrimePower has been enhanced to show a detailed
breakdown of power calculation using the report_power_calculation
command.

In short, PrimePower now supports all of the same commands as PrimeTime
with a few exceptions.  Therefore the same run scripts should work for
both tools.

    - Rishi Chawla
      Synopsys, Inc.                             Sunnyvale, CA
Index    Next->Item







   
 Sign up for the DeepChip newsletter.
Email
 Read what EDA tool users really think.


Feedback About Wiretaps ESNUGs SIGN UP! Downloads Trip Reports Advertise

"Relax. This is a discussion. Anything said here is just one engineer's opinion. Email in your dissenting letter and it'll be published, too."
This Web Site Is Modified Every 2-3 Days
Copyright 1991-2024 John Cooley.  All Rights Reserved.
| Contact John Cooley | Webmaster | Legal | Feedback Form |

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)