( ESNUG 441 Item 11 ) ------------------------------------------- [03/09/05]
Subject: Ten EDA Vendors/PR People Find Flaws with the Verification Census
> 11.) Does your company use verification IP? For which protocol? USB,
> PCI, FireWire, Ethernet, AMBA, 1394? Which one specifically? Is
> the IP used for reference checking only, bus-functional modeling
> (BFM), or to measure coverage of the standard as well? Whose IP
> do you use? Verisity? Synopsys DesignWare? Cadence? Mentor?
From: Kevin Silver <kevin=user domain=denalisoft spot calm>
C'mon John!
Denali is the number 1 VIP vendor just by virtue of having 99% of all
verification IP for memory and you missed us in this question?!
Also, you need to change "PCI" to "PCI Express", and for this standard, we
have over 82% of the market with 50+ customers.
I hope I don't forget to send you a ticket to the Denali DAC Party this year.
- Kevin Silver
Denali Software Palo Alto, CA
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From: Dale Pollek <dale=user domain=chipmd spot calm>
John,
I noticed there was no question about Verilog-A/AMS. This is the only area
of Verilog ChipMD is and has been interested in DVcon, but is apparently
not important for DVcon attendees?
Would it be possible to add one category/question to ask about use of or
needs for A/AMS language? If so, please also include which vendors versions
are liked or avoided and whether AMS is used in top-down flow or for
replacing parts in latter design simulations. Thanks.
- Dale Pollek
ChipMD, Inc. Cupertino, CA
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> 10.) Do you use HW/SW co-simulation like CoWare ConvergenSC or Mentor
> Seamless or Aldec Riviera-IPT? Which? What do you think of them?
From: Mike Bradley <mike_bradley=user domain=mentor spot calm>
Hi John,
These are great questions. I had one addition to question 10:
Are these tools viewed as a replacement or augmentation to prototyping
and software developement, or are they viewed as an improvement to the
hardware design/verification process?
Thanks,
- Mike Bradley
Mentor Graphics Wilsonville, OR
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From: Nasib Naser <nasib.naser=user domain=synopsys spot calm>
Hi John,
You need to add "or System Studio" in item 10! Always add Synopsys System
Studio everytime you mention HW/SW co-simulation.
- Nasib Naser
Synopsys, Inc. Mountain View, CA
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> 2.) Do you see your project using SystemC within the next 6 months?
> (Yes or No) Are you using SystemC for (choose one) high level
> modeling, or verification, or for design? Which?
From: Gloria Nichols <gloria=user domain=launchm spot calm>
Hi John,
Why did you add "choose one" to your SystemC question?
All of Forte's customers do modeling -- which is really the same as design
since they will put it through Forte's tool.
So a user can use SystemC both for modeling and design. Certainly some may
just create a model to prove functionality, then discard it, but by making
them pick one, your question doesn't allow for people who do both modeling
and design. If engineers use SystemC for multiple purposes (which will
happen more and more over time), why would you choose to not represent that?
- Gloria Nichols
Launch Marketing Woodside, CA
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> 4.) What do you think about Verisity Specman "e" vs. Synopsys Vera?
> Does your project use either of these?
From: Donna Mitchell <donna=user domain=syncad spot calm>
Hi John,
In section 4 please add another question:
"What other test bench generation tools do you use? (SynaptiCAD,
Diagonal Systems)"
To be fair.
- Donna Mitchell
SynaptiCAD Blacksburg, VA
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From: Barbara Marker <barbara=user domain=hipcom spot calm>
Hi John,
Below are Aldec's changes to 9 and 10
9.) Does your company use HW emulators/accelerators like Cadence
Quickturn Palladium, Mentor IKOS/Meta Systems, Verisity Axis,
Tharas, Pittsburgh Simulations, Aldec Riviera-IPT, EVE, or Aptix?
10.) Do you use HW/SW co-simulation like CoWare ConvergenSC or Mentor
Seamless or Aldec Riviera-IPT? Which? What do you think of them?
Riviera-IPT is a HW accelerator and co-verification solution for ARM
specifically. Thank you,
- Barb Marker
HighPointe Communications Portland, OR
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From: Jonas Nilsson <jonas=user domain=hardi spot calm>
Hi John,
Don't you have a question about Hardware Prototyping? You could ask how
many are doing it, how many are developing platforms in-house and how many
are using an existing platform like our HAPS system.
It would be of great interest for us and other platform vendors to know
the figures.
- Jonas Nilsson
Hardi Electronics AB Lund, Sweden
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> 9.) Does your company use HW emulators/accelerators like Cadence
> Palladium, Mentor IKOS/VStation/Celaro, Verisity Axis, Tharas,
> Pittsburgh Simulations, EVE ZeBu, or Aptix? What do you think
> about them? What type of set-up time do you see with them?
From: Joseph Rothman <joseph.rothman=user domain=prodesign-usa spot calm>
Hi John,
Regarding question 9, You have forgotten to mention ProDesign. Since we are
now a significant player, it might be interesting to get feedback. Also
you might consider these additional questions.
Is rapid prototyping a valid form of verification? Is it growing in
use? Why/why not? Pros/cons of using FPGA-based prototyping solutions?
Thanks.
- Joseph Rothman
ProDesign-USA San Jose, CA
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From: Steven Brown <stevebr=user domain=verisity spot calm>
Hi, John,
There's a total absence of the vManager category in your verification tool
use census. But I'm OK with the survey not covering that area. Our users
are really successful with it, and I'd rather not help Synopsys or Mentor
understand why.
- Steve Brown
Verisity Design, Inc. Mountain View, CA
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