( ESNUG 439 Item 9 ) -------------------------------------------- [02/15/05]
Subject: General questions for all the panelists
With so much IP changing hands these days, when is somebody going to
make a smarter VHDL-to-Verilog translator (RTL to RTL)?
---- ---- ---- ---- ---- ---- ----
1. What is your prediction for the ASIC starts trend for next five years
2005-2010 (Write it down).
2. How your company can reinvent itself to deal with a fast shrinking
market.
---- ---- ---- ---- ---- ---- ----
What are all of you doing to reduce the number of tools required,
engineers required and time needed to complete an average SOC/ASIC
design by 75% over the next three years?
---- ---- ---- ---- ---- ---- ----
When do you plan to support the new version of VHDL which is currently being
developed?
---- ---- ---- ---- ---- ---- ----
Are you considering using compute utility grids offered by outside
providers in your design and development models?
---- ---- ---- ---- ---- ---- ----
Why are you guys still in EDA? Where's the growth going to
come from (design starts are down, you already have long-term contracts,
we're not seeing meaningful new tool categories...)?
---- ---- ---- ---- ---- ---- ----
How can tools like "Matlab" become more easily integrated with traditional
digital simulation/verification tools?
---- ---- ---- ---- ---- ---- ----
Is there a place for innovation when the Big Three sue the small
successful companies as a competitive tactic?
---- ---- ---- ---- ---- ---- ----
If the Structured ASIC vendors do the same as the FPGA vendors and make
their own cheap EDA software, is there any future for the EDA industry?
---- ---- ---- ---- ---- ---- ----
How does the emergence of design in China impact
a) your business models
b) intellectual property of designs and
c) software support etc
---- ---- ---- ---- ---- ---- ----
How many full time people do you have dedicated to software quality (who
dont do anything else but QA)?
---- ---- ---- ---- ---- ---- ----
When are they all (except Ted) going to get off the OpenAccess fence
stop paying lip service and get on with implementation/delivery?
---- ---- ---- ---- ---- ---- ----
What's going on with Linux and CAD tools. Which version of Linux will
tools run on? Are you guys picking winners or going where the users are?
---- ---- ---- ---- ---- ---- ----
1.) What are your plans to provide value to FPGA customers?
2.) Do you plan to provide co-design tools for embedded processors in
FPGA's?
---- ---- ---- ---- ---- ---- ----
Are you people ever going to hire American citizens again?
---- ---- ---- ---- ---- ---- ----
Why are you all so late with Low Power support and techniques ?
---- ---- ---- ---- ---- ---- ----
Designs below 90nm are looking an awful lot like analog. Can you ask
what EDA is going to do about large scale accurate transistor level
circuit simulation?
---- ---- ---- ---- ---- ---- ----
Are design services intended to diversify and augment revenue or are
they needed to help pre-sales? What does that say in general about
user frustration and design productivity?
---- ---- ---- ---- ---- ---- ----
What is your company's DFM strategy, if any?
How will your find the expertise to integrate DFM into its products?
How will you monetize your investment in developing manufacturing knowhow
and effectively integrating it into your products.
|
|
