( ESNUG 439 Item 8 ) -------------------------------------------- [02/15/05]

Subject: Questions for Gary Smith, Senior EDA Analyst of Gartner


How accurate have your market predictions been? It seems that
ever year you project 10% - 20% growth across almost every segment and
it's been flat for a while now, dude?

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Ask Gary why his numbers are such crap.

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Please ask Gary if he really believes the ESL market has really grown
40% or did he just add Mathworks to numbers?

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Question 1 for Gary Smith, Gartner/Dataquest: How do you think the static
timing market will evolve in the next 3 years?

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Gary Smith:  Ask him how over the last several years how his forecasts
at the beginning of the year have compared to the actual results at the
end of the year and what he could have done better to close the gap in
the variance.

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Is there any hope of reducing the design costs of deep ASICs where
the # of new starts will reverse its current downward trend?

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The NRE especially mask cost are growing exponentially from node to node
($2.5 M at 65 nm).  This makes it almost unaffordable to do a respin for
yield.  On the other side the process guys in the fab expect geometric
structures that are as homogenous as possible.  Gary, was is the best
DFM solution you've heard of so far?  Why?  Name names.

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TO Gary Smith:
   Two years ago, RTL floorplaning and virtual protyping were buzz
   words and Gary had predicted that this market will take off.
   Now we know that Tera under reorganization pressure and Intime 
   slowly disappearing, what the future prediction for this space?

TO Gary Smith:
   What's the silver bullet that can make single digit Billion dollar
   EDA industry to two digit Billion dollar industry?

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When are EDA tools going to actually compete on price, instead of engaging
in price fixing for similar tools?

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Why do EDA companies charge US companies 5X more than an Chinese companies
for an equivalent physical design toolset?

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Do you agree that there are industry competitive practices that have had a
negative impact on the overall health and perception of the EDA market, like
bundling strategies, discounting, or on-going legal disputes?

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So many US companies keep citing the low cost of engineers in India as
the main impetus for opening offices there. However, I read articles in
magazines such as The Economist saying that the cost of those
engineers, particularly in Bangalore, is growing at a fairly high rate.
What does the panel see as the "lifetime" of the inexpensive Indian
engineer?

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Gary:  Room-temperature silicon will hit the wall somewhere
around 35 or 40 nanometers.  What happens after that?

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Why did you completely ignore System Verilog in your last report?

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If we add so much value how come nobody is willing to pay for it?
Are we drinking our own Cool Aid?

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I have no first-hand knowledge, only rumors, but I've heard that CAE tools
are being sold in India cheaper than in the US or Europe.  I would like to know
if it is true, and if it is, how can it be in the best interest of the CAE
companies to endanger their end-users jobs to offshoring?



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