( ESNUG 437 Item 4 ) -------------------------------------------- [01/11/05]

Subject: Top 30 Keyword Searches on DeepChip for 2004 (part I)

MIND READING:  The other way you can read what's on engineer's minds is to
look at the keyword searches they do over the year -- a sort of collective
stream of consciousness.  This table is in the format of "keywords"
followed by # of searches.  For example, "on chip variation 119" means
that "on chip variation" was searched for 119 times.


  1.) On Chip Variation & OCV

      on chip variation 119
      on-chip variation 28
      what is on chip variation 6
      intra-die variation 5
      on-chip variation static timing analysis 5
      on_chip_variation 5
      boston snug matt weber on-chip variation 4
      ocv on chip variation 4
      on chip variation ocv 4
      opc variation analysis in primetime 4
      on chip variance dft 3
      on chip variation hold time 3
      on chip variation ocv pdf 3
      on chip variation primetime 3
      on-chip variation delays clocks 3
      snug on-chip variation 3
      sta on chip variation 3
      what is on-chip variation 3
      ocv variation 2
      asic skew variation chip on-chip 2
      ibm on-chip variation approach 2
      ocv onchip variations 2
      on chip variation basics 2
      on chip variation hold 2
      on chip variation setup hold 2
      on-chip variation clock design 2
      on-chip variation timing analysis 2
      opinion on chip variation 2
      pin capacitance on-chip variation ocv 2
      pvt variations across die 2
      pvt variations timing analysis 2
      timing analysis on-chip variation 2
      wire variation extraction star-rc 2
      across chip variation 1
      across die variation timing 1

      ocv analysis 14
      primetime ocv 6
      chip ocv 5
      ocv sta 4
      ocv timing 4
      timing margin for ocv 4
      ocv primetime 3
      ocv tsmc 3
      synopsys ocv 3
      ocv variation 2
      clock ocv 2
      ocv 2
      ibms ocv 2
      ocv clock 2
      ocv delay 2
      ocv local chip 2
      ocv pll 2
      ocv redhawk 2
      ocv synopsys 2
      ocv synopsys clock 2
      ocv synopsys on chip 2
      ocv timing white paper 2
      ocv tutorial 2
      pin capacitance ( on-chip variation ocv) 2
      useful skew ocv 2
      what is local ocv chip? 2
      asic ocv 1

      
  2.) Lockup Latches

      lockup latch 146
      lockup latches 12
      lock-up latch 22
      lock-up latches 4
      scan lockup latch 8
      what is a lockup latch 8
      lockup latch scan 6
      what is lockup latch 6
      lockup latch dft 4
      dft lockup latch 3
      lockup latch design 3
      lockup latch waveform 3
      why lockup latch 3
      lockup latch clock balancing 2
      lockup latch concept 2
      lockup latch dft scan 2
      lockup latch in scan insertion 2
      lockup latch scan chain 2
      lockup latches asic vlsi 2
      lockup latches at the end of the scan chain 2
      lockup latches in avanti tool 2
      lockup latches in scan chains 2
      lockup latches in scan insertion 2
      lockup latches scan avanti 2
      scan insertion lockup latch 2
      tetramax lockup 2
      verplex lockup 2
      lock-up latches for atpg 2
      lock-up latches in scan chains 2
      lock-up latches scan capture 2
      what is the use of lock-up latch 2


  3.) Useful Skew 

      useful skew 82
      useful clock skew 15
      what is useful skew 7
      set_clock_skew 6
      timing_self_loops_no_skew 6
      useful skew pros cons 6
      zeroskew 5
      clock skew optimization 4
      useful skew clock 4
      concept of useful skew 3
      intentional clock skew 3
      set_clock_skew -uncertainty 3
      synopsys clock skew 3
      useful skew in a design 3
      0.18u process clock skew 2
      asic clock skew problems 2
      asic skew variation chip on-chip 2
      astro cts clock uncertainty skew 2
      check clock skew in primetime 2
      clock skew architecture scan 2
      clock skew optimization fishburn 2
      clock skew problems snug papers 2
      clock skew timing analysis synopsys 2
      clock skew tutorial 2
      clockwise skew 2
      good skew 2
      how to decide clock skew 2
      magma cts useful skew 2
      nec structured asic clock skew problems hold time violations 2
      non-skew routing clock 2
      pll clock skew removal 2
      sdf negative clock skew 2
      set_clock_uncertainty clock domain skew 2
      skew tool 2
      slack hold skew definition 2
      useful clock skew sunplus 2
      useful skew code 2
      useful skew ocv 2
      what is clock skew 2
      what is useful skew? 2
      why minimize skew 2
      zero skew 2
      useful skew algorithm 1
      (useful skew) 1
      _skew 1
      adding clock skew 1
      ambit clock skew 1
      apollo clock skew 1
      apollo clock skew report 1
      astro clock skew 1
      benchmark skew 1

      
  4.) System Verilog

      system verilog 109
      system verilog assertions 16
      system verilog systemc 14
      system verilog simulator 8
      system verilog support 7
      system verilog interfaces 6
      system verilog tutorial 6
      system verilog vs systemc 6
      system verilog vera 5
      vcs system verilog 5
      what is system verilog 5
      aart de geus system verilog 4
      future of vera system verilog 4
      sva system verilog 4
      system verilog assertion 4
      system verilog synopsys 4
      systemc system verilog 4
      advantages of system verilog 3
      synopsys system verilog 3
      system verilog 3.1 modelsim 3
      system verilog compiler 3
      system verilog constraint solver 3
      system verilog tools 3
      systemc vs system verilog 3
      vera system verilog 3
      compare system verilog systemc 2
      future of system verilog 2
      how to learn system verilog 2
      openvera system verilog 2
      quartus system verilog 2
      specman vera system verilog 2
      synthesizable system verilog 2
      system verilog advantages 2
      system verilog assertion open vera 2
      system verilog blogs 2
      system verilog cadence 2
      system verilog dave sutherland 2
      system verilog features 2
      system verilog future 2
      system verilog modelsim 2
      system verilog nvidia 2
      system verilog ova 2
      system verilog slides power point 2
      system verilog specman snug 2
      system verilog vera e systemc specman 2
      system verilog vs vera 2
      systemc versus system verilog 2
      tools support system verilog 2
      verilog system verilog assertions 2
      what is good about system verilog 2
      $system verilog 1
      accelera system verilog 1
      avery system verilog 1
      bangalore system verilog 1
      behavioral synthesis system verilog 1
      benefits system verilog 1
      bind construct in system verilog 1

      systemc systemverilog 5
      snug systemverilog 4
      systemverilog systemc 3
      emacs mode systemverilog 2
      online systemverilog tutorial 2
      problems with systemverilog assertion 2
      systemc and systemverilog 2
      systemverilog systemc 2
      vera vs systemverilog 2


  5.) First Encounter, SoC Encounter, & PKS

      first encounter 37
      socencounter 8
      test cases first encounter ir drop 8
      first encounter flow 6
      cadence first encounter 5
      footprint timing analysis encounter 5
      jupiterxt first encounter 5
      soc encounter lef 5
      clock trees added by pks vs soc encounter 4
      first encounter cadence tcl 4
      first encounter partition 4
      physical synthesis vs first encounter 4
      astro first encounter 3
      cadence encounter sdf tdf 3
      encounter blockage place route clock lef 3
      encounter max_cap 3
      first encounter manual placement 3
      first encounter to astro 3
      firstencounter cts 3
      intel encounter 3
      nano encounter 3
      soc encounter manual 3
      artisan 0.18 lef encounter 2
      astro soc-encounter 2
      blastplan first encounter 2
      bottom up pin assignment first encounter 2
      cadence first encounter memory usage 2
      cadence first encounter scripts 2
      cadence first encounter write ilm 2
      cell overlap in placement encounter 2
      choose soc encounter astro 2
      clock tree synthesis tutorial encounter 2
      encounter blockage gate place route 2
      encounter place route clock lef floorplan grid 2
      encounter soc 2
      encounter timing closure script 2
      first encounter astro 2
      first encounter cadence 2
      first encounter cadence microsoft 2
      first encounter eda 2
      first encounter eda tutorial 2
      first encounter floorplan script 2
      first encounter i/o placement file 2
      first encounter ipo rc factor 2
      first encounter market share 2
      first encounter scheme tcl floorplan 2
      first encounter versus silicon ensemble 2
      firstencounter other eda 2
      firstencounter tips 2
      how to load apollo gds into soc encounter 2
      perl script for cadence encounter 2
      routing first encounter silicon ensemble 2
      sdc file for soc encounter 2
      encounter blockage place route clock lef 2
      soc encounter 2
      soc encounter lef generation analog block 2
      spc encounter floorplanning 2
      tcl for first encounter 2
      tcl scripts for soc encounter 2
      sdc primetime firstencounter 1
      artisan lef encounter 1
      astro encounter cadence 1
      astro vs first encounter 1

      cadence fe 5
      synthesis sta pnr tools se pks fe 3
      
      cadence pks 8
      pks clock generation max transition setting 4
      report number for flip flops in pks 4
      ambit/pks 3
      cadence pks tutorial 3
      pks cadence 3
      power estimation pks 3
      ambit pks 2
      cadence pks appendix 2
      cadence pks check verify 2
      cadence pks synthesis tutorial 2
      cadence pks timing ultra placer 2
      cadence pks tutorial clusters 2
      can pks generate an sdf 2
      carry save adder pks 2
      circuit area recovery pks 2
      compare pks to magma 2
      cts in pks 2
      help manual for cadence pks 2
      pks primetime accuracy 2
      pks propagate constraints 2
      pks scripts 2
      pks synthesizable kit tutorial 2
      pks tdm manual 2
      root tool se-pks 2
      routing pks shell 2
      se pks 2
      sepks 2
      syntest dft in pks flow 2
      thad pks 2
      what should be scan chain start end points for cadence pks 2
      3m impact tool pks 1
      ambit buildgates synthesis cadence pks 1
      area recovery pks 1


  6.) Mentor Calibre

      calibre ci 17
      calibre lvs 13
      calibre drc 8
      calibre hercules 7
      calibre license 7
      calibre 6
      calibre vs assura 6
      calibre xrc 6
      calibre hercules dac 5
      mentor calibre 5
      benefits of calibre drc in flat mode 4
      calibre cadence 4
      calibre lvs price 4
      calibre lvs rule decks 4
      hierarchical net name in calibre lvs 4
      lvs calibre 4
      lvs calibre debug 4
      v2lvs command calibre 4
      assura calibre 3
      assura calibre comparison 3
      calibre assura 3
      calibre erc errors 3
      calibre layout top layer 3
      calibre lvs extra pins on cells 3
      calibre lvs multiple voltages 3
      calibre lvs run 3
      calibre rc extraction 3
      calibre svdb 3
      calibre verilog 3
      calibre vs hercules 3
      calibre xrc extraction flow 3
      calibredrv 3
      epic arcadia calibre 3
      hcell calibre 3
      hercules calibre 3
      star rc calibre 3
      assura calibre market share 2
      assura calibre translator 2
      assura xcalibre starrc 2
      cadence calibre 2
      cadence calibre k2 2
      calibre & runset file & laker 2
      calibre 16 2
      calibre black box 2
      calibre density filler 2
      calibre density via errors rule 2
      calibre diva translate 2
      calibre dracula 2
      calibre environment variable unix 2
      calibre extracted view 2
      calibre flat hierarchical lvs execution 2
      calibre hercules translate rule 2
      calibre hercules translator 2
      calibre layer map 2
      calibre lvs 2
      calibre lvs errors 2
      calibre lvs example 2
      calibre lvs multi power 2
      calibre mentor drc problems 2
      calibre mentor license generator 2
      calibre mentor seats 2
      calibre physical verification dracula standard 2
      calibre rule file 2
      calibre runtime benchmark assura 2
      calibre rve magma 2
      calibre spf 2
      calibre spice netlist 2
      calibre star-rc interface 2
      calibre techfile 2
      calibre v2lvs 2
      calibre verilog netlist 2
      calibre vs. hercules 2
      calibre xrc output spectre 2
      can i run calibre with a skill command 2
      compare calibre to hercules 2
      compare hercules to calibre 2
      dataquest star rc xcalibre 2
      diva calibre layout verification tool 2
      diva to calibre translate 2
      dracula calibre 2
      dracula calibre consulting 2
      dracula calibre diva 2
      dracula hercules calibre translate 2
      dracula vs calibre 2
      hercules calibre market share 2
      hercules vs calibre 2
      hercules vs calibre multithread 2
      how calibre lvs recognize the power net 2
      how to make a cell as black box in calibre lvs 2
      how to use calibre cadence 2
      lvs calibre vs hercules 2
      magma calibre bedikian 2
      mentor calibre drc 2
      mentor calibre faq 2
      mentor calibre license 2
      mentor calibre market share 2
      mentor calibre oa 2
      mentor calibre svrf 2
      mentor philips calibre 2
      mentor tutorial calibre rules 2
      missing port error in calibre lvs 2
      path end segment calibre 2
      perl code to read calibre file 2
      physical verification using calibre 2
      run calibre lvs 2
      run drc in calibre 2
      run-times assura calibre 2
      running calibre 2
      star-rc calibre-xrc 2
      tsmc 0.35 calibre drc 2.3 2
      v2lvs calibre 2
      verilog calibre 2
      xcalibre accuracy 2
      xcalibre dspf rc extraction 2
      xcalibre star-rc accuracy 2
      antenna calibre drc 1
      antenna setting calibre 1
      antenna setting for drc calibre 1
      arcadia calibre 1
      assura cadence calibre 1
      assura calibre hercules 1
      assura calibre rule convert 1
      assura vs calibre 1
      avanti hercules mentor calibre 1

      mentor caliber 6
      assura caliber netlist 3
      hercules caliber dac 3
      assura caliber drc 1
      assura vs caliber 1

      
  7.) Magma, Blast Fusion, Blast Rail, & Blast Create

      magma 28
      magma clock tree 17
      magma blastfusion 9
      charlie simon magma 7
      magma market share 7
      magma astro 6
      magma user group 6
      magma clock tree hierarchy 5
      magma download 5
      tcl magma 5
      glassbox magma 4
      magma blast fusion license file 4
      magma blastcreate 4
      magma lvs 4
      magma router 4
      magma tcl 4
      magma toolset 4
      magma vs astro 4
      magma xxx 4
      run prepare abstract in magma 4
      synopsys magma lawsuit 4
      synopsys vs magma 4
      @magma-da.com 3
      cynthia parrish magma 3
      evaluate magma synopsys cadence p&r tools 3
      gary smith magma 3
      howard landman magma 3
      magma cellrater 3
      magma clock 3
      magma clock routing 3
      magma eda download 3
      magma flexlm license 3
      magma glass 3
      magma glass box 3
      magma hold script eco 3
      magma synopsys 3
      magma tools 3
      rajiv madhavan magma 3
      synopsys magma 3
      synopsys magma benchmark 3
      trang bui magma 3
      avanti magma 2
      benchmarking for eda tools magma 2
      cadence and magma comparison 2
      calibre rve magma 2
      celtic eco magma script tcl 2
      clock gating magma 2
      clock magma cts ctgen 2
      compare pks to magma 2
      connection_class magma synthesis 2
      creating a custom wireload file in magma 2
      deep magma eda 2
      drc notch magma 2
      electromigration flow script magma 2
      magma 2
      magma ir drop 435 2
      feedthrough magma 2
      fishtail magma 2
      freeware magma download eda 2
      get2chip rtl compiler magma competition 2
      hierarchy magma 2
      how to force magma to optimize for setup time violation 2
      howard magma 2
      magma rtl dont care 2
      magma set_case_analysis 2
      magma sutherland effort 2
      magma synopsys cadence pricing comparison 2
      magma synopsys ti dsp 2
      magma tapeouts 2
      magma tcl collection 2
      magma tcl script 2
      magma tcl scripts 2
      magma test insertion 2
      magma training course in bangalore 2
      magma user's 2
      magma versus astro congested designs 2
      magma versus astro eda 2
      magma vs. synopsys 2
      magma-da 2
      making lef in magma 2
      powermill power theatre magma 2
      rajiv magma 2
      results magma astro 2
      segmentation-fault linux magma 2
      set_load magma 2
      siliconsmart magma 2
      sintegra magma 2
      tcl script magma 2
      thomson consumer magma eda 2
      time effort estimation of magma tool flow 2
      transition primetime magma broadcom 2
      verplex magma mismatch 2
      vim syntax file magma 2
      who is better magma cadence 2
      *.html magma suite 1
      @magma-da.com application manager 1
      @magma-da.com director 1
      antenna rules in magma 1
      anti magma 1
      astro magma comparison 1
      astro magma hierarchy 1
      atiq raza magma 1
      atmos java eda magma 1
      averant magma 1
      backend flow magma 1
      blast create price magma 1
      blast magma tutorial 1
      blast plan pro magma 1

      blastrail 7
      blastfusion 7
      intel asic blast 5
      blastcreate 4
      blastrtl feature 4
      blastplan pro 3
      power blastrail 3
      apollo blastfusion 2
      apollo blastfusion competes 2
      apollo blastfusion competing 2
      astro blastfusion 2
      blast create 2
      blast plan 2
      blastcreate mtcl 2
      blastfusion command 2
      blastfusion conversion 2
      blastfusion conversion perl 2
      blastfusion open design problem 2
      blastfusion perl 2
      blastfusion reference 2
      blastfusion unexpected signal : 11 2
      blastplan 2
      blastplan first encounter 2

      ambit blast rtl 1
      atmos blastfusion nt 1
      blast create mtcl 1
      blast create ram requirements 1
      blast fusion 1
      blast fusion commands 1
      blast fusion feedback 1
      blast it are we 1
      blast plan convergence 1
      blast plan prototype 1
      blast plug grenade m36 1
      blast rail voltagestorm 1
      blast rtl issues 1
      blast rtl launch 1
      blast rtl synthesis scripts 1
      blast vs astro vs physopt 1
      blast-fusion clock-tree 1
      blast-fusion tutorial 1
      blastchip 1
      blastchip lucent 1
      blastcreate tools 1
      blastfusion course 1
      blastfusion fixedtiming 1
      blastfusion gds import 1
      blastfusion guide 1
      blastfusion handle 1
      blastfusion linux 1
      blastfusion open design gui 1
      blastfusion set_load 1
      blastfusion spice netlist convert 1
      blastfusion tcl command 1
      blastfusion tcl source perl 1
      blastfusion tutorial 1
      blastfusion vs galaxy 1
      blastnoise 1

      
  8.) Synopsys MPC, PhysOpt, & Physical Compiler

      timing designer mpc 165
      physical compiler mpc 4
      mpc gdsii 3
      physopt mpc 3
      physical compiler mpc constraint 2
      physical compiler mpc minimum physical constraints 2
      synopsys mpc 2

      physopt 24
      synopsys physopt compiler 5
      physopt abort 4
      physopt mpc 3
      comparison astro physopt 2
      physopt -post_route -inc 2
      physopt derate fix 2
      physopt dont 2
      physopt script 2
      physopt si 2
      physopt tutorial 2
      power user design flow physopt esnug 2
      synopsys physopt 2
      write_def physopt 2
      avant pdef physopt 1
      blast vs astro vs physopt 1
      blockage physopt 1

      physical compiler tutorial 20
      physical compiler 11
      physical compiler script 4
      physical compiler flow 3
      physical compiler gui 3
      routing information physical compiler post route 3
      synopsys physical compiler sucks 3
      time borrowing in physical compiler 3
      auto-ungrouping physical compiler 2
      clock gate cells physical compiler 2
      clock tree synthesis in physical compiler 2
      example script physical compiler 2
      high fanout synthesis physical compiler commands variables 2
      physical compiler application note 2
      physical compiler core area cell area 2
      physical compiler eco flow 2
      physical compiler example 2
      physical compiler example scripts 2
      physical compiler for datapath 2
      physical compiler lab manual 2
      physical compiler market share 2
      physical compiler rc correlation 2
      physical compiler sequential cells 2
      physical compiler silicon ensemble 2
      physical compiler site row 2
      physical compiler user guide 2
      physical compiler user guide pdf synopsys 2
      placement algorithm physical compiler 2
      protiming vs physical compiler 2
      reducing physical compiler runtime 2
      synopsys physical compiler doc 2
      synopsys physical compiler fanout setting 2
      astro physical compiler comparison 1
      automated physical synthesis flow using acs physical compiler 1

      
  9.) Adders

      carry save adder 154
      carry-save adder 24
      8 bit adder 14
      bk adder 14
      carry look ahead adder 13
      carry propagate adder 12
      manchester adder 12
      carry save adders 10
      carry propagation adder 6
      carry select adder 6
      systemc adder 5
      carry look ahead adder verilog 4
      carry-save-adder 4
      carry save adder indesign compiler 3
      designware adders 3
      full adder 8 bits 3
      ripple adder 3
      vector adder 3
      verilog carry look ahead adder 3
      what is carry save adder 3
      16 bit carry save adder 2
      32 bit adder 2
      4 bit look ahead carry adder gds 2
      8-bit adder in tsmc .13 um process 2
      ambit library adder 2
      carry look ahead adders 2
      carry look-ahead adder 2
      carry look-ahead adder verilog behavioral code 2
      carry look-ahead adder vhdl 2
      carry lookahead adder 2
      carry lookahead adder verilog 2
      carry lookahead adder vhdl 2
      carry save adder carry look ahead adder 2
      carry save adder dc ultra 2
      carry save adder example 2
      carry save adder logic 2
      carry save adder performance 2
      carry save adder pks 2
      carry save adder tree 2
      carry select adder vhdl quartus ii 2
      carry-look-ahead-adder 2
      critical path mirror adder logic effort 2
      csa carry save adder 2
      different adder architecture using vhdl 2
      different types of adders 2
      double carry adder 2
      flagged prefix adder cmos 2
      gate count adder cla 2
      gtech full adder verilog example 2
      32-bit adder gate count 1
      32-bit carry select adder 1
      4 bit carry look ahead adder gate level in verilog coding 1
      4-bit manchester adder 1
      5 kind of full adders 1
      64 bit carry select adder design 1
      8 bit adder code 1
      8 bit adder project 1
      8 bit adder systemc 1
      8 bit adders design 1
      8 bit carry select adder 1
      8 bit manchester adder 1
      8 bits adder 1
      8-bit adder code 1
      8-bit adders examples 1
      8-bit carry look ahead adder verilog 1
      8bits look ahead carry adder 1
      8x8 carry save adder (schematic) 1
      adder 1
      adder 8 bits 1
      adder add clk 1
      adder datapath layout 1
      adder design gate-level carry lookahead carry select speed 1
      adder fast carry logic 1
      adder gtech 1
      adder hspice cla 1
      adder signed overflow 1
      adder signed vhdl 1
      adder verilog generate 1
      adder manchester adder 1
      adders uses in the industry 1
      adding three numbers using carry save adders 1
      advantage of carry save adder 1
      alu with carry select adder 1
      ambit synthesis cla adder 1
      ancient adder 1
      architectures-for-adders 1
      asic fpga adders carry look ahead 1
      ask multiplier adder 1
      basic adders 1
      bist signature adder verilog 1
      bit serial adder 1
      bit serial adder andraka 1
      bk adder comparison 1
      bk adder implementation 1
      bk adders 1
      booth adder 1

      
 10.) Synopsys PrimeTime

      primetime tutorial 65
      primetime script 24
      synopsys primetime tutorial 18
      primetime scripts 12
      primetime-si 11
      primetime user guide 9
      latch primetime 9
      primetime tcl script 9
      primetime celtic 8
      rc-004 primetime 8
      primetime tcl script 7
      primetime combo 6
      primetime ocv 6
      primetime sta tutorial 6
      primetime tcl 6
      synopsys primetime training 6
      time borrowing primetime 6
      arnoldi primetime 5
      artisan primetime stamp model 5
      create_clock primetime 5
      primetime finding clock domain crossings asic 5
      primetime report_timing 5
      celtic primetime 4
      celtic primetime si 4
      ddr timing primetime 4
      from primetime celti 4
      gating checks in primetime 4
      how can i see unconstrained path with primetime 4
      insertion delay in primetime 4
      negative resistance primetime 4
      opc variation analysis in primetime 4
      primetime 0406 4
      primetime arnoldi 4
      primetime check item 4
      primetime clock 4
      primetime hierarchical spef 4
      primetime latches analysis edge 4
      primetime si 4
      primetime sta 4
      primetime timing reports 4
      primetime timing window 4
      primetime timing window analysis 4
      primetime user's manual 4
      sdc primetime si 4
      synopsys primetime 4
      synopsys primetime user manual 4
      tcl primetime 4
      timing window primetime 4
      timing windows primetime 4
      arnoldi algorithm primetime 3
      constraint one-hot in primetime synopsys 3
      ddr primetime synopsys 3
      graphical primetime waveform 3
      ilm primetime 3
      no constrained paths primetime 3
      ocv primetime 3
      on chip variation primetime 3
      primetime & spef & error 3
      primetime celtic 3
      primetime constraints 3
      primetime group_path 3
      primetime ideal nets 3
      primetime incremental sdf 3
      primetime ldelete 3
      primetime no constrained paths 3
      primetime qtm 3
      primetime qtm model 3
      primetime revenue synopsys 3
      primetime runtime 3
      primetime script example 3
      primetime sdf 3
      primetime set_input 3
      primetime si hierarchical crosstalk analysis 3
      primetime si runtimes 3
      primetime time borrowing 3
      primetime user manual 3
      primetime write_spice_deck 3
      primetime slope 3
      spef primetime 3
      synopsys primetime revenue market share 3
      synopsys primetime user's manual 3
      tutorial primetime 3
      what is time borrowing in primetime? 3
      .sdc files primetime 2
      apollo primetime 2
      awk for primetime reports 2
      basics of static timing analysis using primetime 2
      case analysis vs mode analysis in primetime 2
      celtic primetime iterations 2
      celtic versus primetime 2
      check clock skew in primetime 2
      clk-q delay primetime 2
      clock domain crossing primetime 2
      clock gating check in primetime 2
      clock timing report primetime 2
      constraint one hot in primetime synopsys 2
      constraints primetime to mantle 2
      convert einstimer constraint to primetime 2
      dc primetime constraints 2
      ddr constraint primetime 2
      ddr constraints primetime 2
      ddr primetime scripts 2
      ddr timing constraints primetime 2
      delay prediction in primetime 2
      design budgeting using primetime 2
      designtime versus primetime 2
      difference between primetime design compiler 2
      differences primetime einstimer 2
      dspf primetime 2
      dspf primetime assura 2
      dspf wl : primetime 2
      einstimer primetime 2
      example of primetime script constraints pre-layout 2
      example primetime script 2
      example primetime scripts 2
      false path multicycle path violation primetime 2
      filter_collection primetime 2
      finding clock domain crossing primetime 2
      finding synchronizers using primetime 2
      four corner primetime 2
      gated clock primetime synopsys 2
      gated clocks primetime 2
      generating sdf vital primetime 2
      hold time astro primetime 2
      how to do sta with synopsys primetime 2
      how to get pin attributes in primetime 2
      ilm create primetime 2
      interface logic model primetime 2
      logical library primetime rename synopsys 2
      magma primetime 2
      magma primetime si flow 2
      makefile based primetime 2
      no constrained paths. primetime 2
      paul zimmer primetime 2
      pci 66mhz primetime constraints 2
      pks primetime accuracy 2
      primetime & current source 2
      primetime & spef 2
      primetime - celtic 2
      primetime 2002.03 timing analysis 2
      primetime accuracy 2
      primetime advertizing 2
      primetime all_clocks 2
      primetime analog blocks 2
      primetime brackets verilog 2
      primetime ceff 2
      primetime check floating net 2
      primetime check_design floating input 2
      primetime clock mesh 2
      primetime clock network delay 2
      primetime clock timing load 2
      primetime clock transition 2
      primetime clocktree 2
      primetime cmd-013 2
      primetime convert collection to list 2
      primetime crosstalk 2
      primetime dataquest 2
      primetime dataquest 1997 synopsys 2
      primetime ddr timing report 2
      primetime dataquest 2
      primetime delay calc 2
      primetime derive_clocks 2
      primetime disable timing from clock 2
      primetime eco 2
      primetime etm 2
      primetime etm example 2
      primetime example file 2
      primetime expanding clock 2
      primetime extract_model example 2
      primetime false path 2
      primetime find timing path 2
      primetime foreach all_clocks 2
      primetime gated clock 2
      primetime generated clocks 2
      primetime get_cells 2
      primetime high fanout net 2
      primetime histograms 2
      primetime input slope 2
      primetime input transition 2
      primetime invalid endpoint 2
      primetime io constraints 2
      primetime ipo script 2
      primetime issues sta 2
      primetime long runtime 2
      primetime makefile example 2
      primetime market share 2
      primetime market share sta 2
      primetime max transition warnings 2
      primetime modeling user guide 2
      primetime multicycle generated clock 2
      primetime multicycle path 2
      primetime negative delays 2
      primetime net delay calculation 2
      primetime net transition report 2
      primetime noise models library 2
      primetime nworst 2
      primetime output delay 2
      primetime path delay 2
      primetime pathmill 2
      primetime paul zimmer 2
      primetime pin to pin timing script 2
      primetime repair nanoroute 2
      primetime reports 2
      primetime reset_path 2
      primetime results 2
      primetime script -tv 2
      primetime script file 2
      primetime set false path 2
      primetime set max_fanout violation 2
      primetime si & spef 2
      primetime si capabilities 2
      primetime si evaluation 2
      primetime si pessimism 2
      primetime slope 2
      primetime spef 2
      primetime spef sdf 2
      primetime sta design flow 2
      primetime sta flow 2
      primetime sta issues 2
      primetime sta sdf analysis 2
      primetime static timing guide 2
      primetime synchronizer 2
      primetime synopsys clock timing 2
      primetime synopsys min max 2
      primetime tcl create_clock 2
      primetime timing documentation 2
      primetime timing model 2
      primetime timing report 2
      primetime timing units 2
      primetime timing window file 2
      primetime tlf 2
      primetime to dc_shell script 2
      primetime transition time 2
      primetime tutorial 1999 2
      primetime tutorial setup hold 2
      primetime tutorial sta 2
      primetime update_timing 2
      primetime user group 2
      primetime with spef 2
      primetime write .lib 2
      primetime write_sdf 2
      primetime zero clock tree 2
      primetime-si license cost static timing 2
      primetime-si market share 2
      read incremental sdf into primetime 2
      remove false path primetime 2
      report cross clock path in primetime 2
      report_timing primetime 2
      sdf cond primetime 2
      sdf primetime discrepancy 2
      sdf primetime manual 2
      set_clock_latency man page for primetime 2
      set_false_path in primetime 2
      set_multicycle_path primetime 2
      snug primetime 2
      speeding up primetime 2
      spef rc primetime 2
      spef starrc primetime 2
      sta primetime 2
      sta tutorial primetime 2
      static timing analysis in design compiler primetime bsnug 2000 t 2
      step on writing primetime constraint 2
      strings in primetime commands synopsys 2
      synopsys _ primetime 2
      synopsys primetime api example 2
      synopsys primetime checklist 2
      synopsys primetime create_clock 2
      synopsys primetime create_net_clock 2
      synopsys primetime ddr example 2
      synopsys primetime download 2
      synopsys primetime get_cells 2
      synopsys primetime good bad 2
      synopsys primetime script timing report 2
      synopsys primetime type out the chip 2
      synopsys primetime users manual 2
      synopsys static timing analysis primetime eval criteria 2
      tcl primetime filter 2
      tcl tutorial primetime 2
      timing windows from primetime to run celtic 2
      tops snug primetime 2
      transition primetime magma broadcom site:www.deepch 2
      tutorial on primetime 2
      twf primetime 2
      understanding clock gating checks in primetime 2
      using wildcards in primetime 2
      vera primetime ftp 2
      waiting for license primetime tcl 2
      what is annotated capacitance primetime 2
      what is v file in primetime 2
      why we need to preserve the unconnected nets in primetime 2
      wire load selection primetime 2
      write spice deck primetime si 2
      write_sdc in primetime 2
      writing flat sdc in primetime 2
      xilinx sdf causing problems in primetime 2
      zimmer primetime paper clock domain 2
      pt primetime script 1
      $setuphold<setup> primetime 1
      -master_clock primetime 1
      -through & primetime & synopsys 1
      90nm sta primetime 1
      sdc primetime firstencounter 1
      allocate_budgets primetime 1
      artisan tsmc primetime stamp model 1
      astro primetime correlation 1
      astro primetime eco script 1
      astro primetime si flow 1
      avanti eco file primetime connect 1
      back annotate from primetime to dc 1

      eda sta startups 4
      ocv sta 4
      synthesis sta pnr tools se pks fe 3
      viewlogic sta 3
      crpr sta 2
      dac sta 2
      extraction sta 2
      false paths multicycle paths in sta 2
      noise characterization of library for sta 2
      pvt corners sta analysis 2
      sapphire sta lsi eda 2
      sdram sta timing constraint 2
      setup violation in sta static timing analysis 2
      spef spf sta 2
      sta eco script 2
      sta flow 2
      sta report for multicycle path 2
      sta tutorial synopsys 2
      static timing analysis sta delay slope slew transition time cell 2
      statistical timing modeling sta synopsys 2
      synopsys sta basics 2
      synopsys sta eval 2
      synopsys sta tutorials 2
      timecraft sta 2
      timing model sta 2
      using design compiler for sta 2
      verilog timing simulations sta compare 2
      advantages disadvantages of sta dsc 1
      after antenna fix sta 1
      ambit sta command line 1
      ambit sta signoff 1
      annotate pt sta 1
      arnoldi time domain sta 1
      back annotation in sta 1

      static timing analysis tutorial 47
      static timing analysis 16
      on-chip variation static timing analysis 5
      static timing analysis tutorials 4
      tutorial on static timing analysis 4
      static timing tutorial 3
      async reset static timing analysis 2
      cadence static timing analysis 2
      ddr static timing 2
      scan mode static timing analysis 2
      static timing analysis concepts 2
      static timing analysis constraints 2
      static timing analysis qor 2
      scan mode static timing analysis 2
      setup violation in sta static timing analysis 2
      static timing analysis concepts 2
      static timing analysis constraints 2
      static timing analysis in design compiler primetime bsnug 2000 t 2
      static timing analysis qor 2
      static timing analysis sta delay slope slew transition time cell 2
      synopsys static timing analysis primetime eval criteria 2


      
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