( ESNUG 407 Item 13 ) ------------------------------------------- [02/26/03]
From: Mark S Wroblewski <clown=markwrob circus=attbi got gone>
Subject: An Ex-PhysOpt User Asks Is Cadence FE-Ultra/PKS Up To Snuff Now?
Hi, John,
Before being laid off from Cirrus, we used PhysOpt in our 0.25 and 0.18 um
flow to cover timing closure. Our flow still had open holes with regards
to floorplanning and power supply design, implementation, and analysis.
Just before I left, we started evaluating Cadence FE Ultra with an eye on
replacing PhysOpt with PKS. My question is what is the list's experience
with FE Ultra and PKS? Do these tools do the jobs I mentioned well?
What are the gotchas?
First, a few words about our flow in use, which I refer to below as "the old
tools": DC for RTL-to-gates; PhysOpt in gates-to-placed-gates mode; Cadence
CTgen for clock tree generation; Cadence SE for Sroute (power & ground) and
Warp route (clocks & signals); Synopsys Arcadia for 2.5D extraction;
PrimeTime for SDF creation and analysis; back-annotation to PhysOpt for IPO.
Floorplan and power & ground implementation was done either with scripts
driving Silicon Ensemble, or a Perl script which built a layout DEF
directly, since the last floorplanning tool we had, Cadence Design Planner,
had already been orphaned by CDN and never gave us all that we really needed
anyway.
Here's some examples of power issues we've dealt with in the past with much
hard work and time spent, and for which I'm looking to FE Ultra to handle:
- Notching power rings: with the old tools (CDN DP) we were using, putting
down a rectangular power ring around a core was easy; getting the ring
to have notches around cells in the corner like PLLs took a great deal
of hand work. Eventually, we wrote a script to drive SE sroute to do
this, but it took awhile to get it written right, and it must be
rewritten for each new chip. Now I see CDN FE Ultra can do this
automatically if the user selects to "exclude selected blocks" when
routing the ring. Or at least Cadence says it can. Can it?
- Multiple layers on rings: to reduce the area required for supply rings,
we used multiple layers. We also intermingled the nodes in these ring
stacks, so for example the outer of two rings would be stacked as VDD,
GND, VDD on 3 of 5 routing layers, and the inner of the two rings would
be stacked as GND, VDD, GND on some other 3 of 5 routing layers. Strips
across the middle on two layers vertically and one layer horizontally
would tie everything together and deliver the supplies to the row metal.
We were able to work this by hand, but the old tools (CDN DP, SE Sroute
in "automatic" usage scenarios) couldn't cope. Does FE Ultra do any of
this effectively?
- Power supply design and analysis: Our old way of design and analysis
for the power supply metal was an MS Excel spreadsheet. What I really
was looking for was a tool that studied the placed netlist and helped me
beef up or trim down the power supply grid. FE claims to do this.
What's the truth? And what kind of clock trees does it assume? Zero
skew? Useful skew? Or does it use a netlist with clock trees inserted?
- Ring macros and other special cases: SE Sroute does a decent job of
connecting row metal to ring macros (e.g., RAMs, register files) in most
cases but coughs sometimes where high congestion exists. (For example,
where a via was dropped to get from the macro's internal supply to the
ring around the macro.) Unfortunately, this happened often enough that
we couldn't ignore it, so more hand fixing. How is FE with this today,
as I understand it uses a new version of SE's Sroute for most heavy
lifting?
On PKS vs Physical Compiler: Two and a half years ago when we were looking
at physical synthesis, Physical Compiler was ready and garnering design
wins, while PKS required lots of workarounds to produce anything close to
useful results. So we chose PhysOpt and haven't looked back, taping out a
number of designs. Two and a half years is alot of time to get problems
fixed. Is it enough time for PKS to be ready? Details?
- Mark Wroblewski
ex-Cirrus and looking Lafayette, CO
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