( ESNUG 406 Item 14 ) ------------------------------------------- [02/12/03]
Subject: Two Consultants Report On Last Week's DesignCon 2003 Conference
From: James Lee <beginning=jml end=asicgroup fought yawn>
Hi, John,
Here's my quick report on DesignCon last week (January 27-30): Monday with
only technical sessions was well attended. There was a low turnout of only
around a dozen for Stu Sutherland's excellent System Verilog tutorial. The
nano engineering technology forum was better attended. Tuesday's keynote
luncheon speech by Chris Malachowsky of NVIDIA was a great multimedia
presentation starting with the crude graphics of early Atari and PC video
games concluding with the near movie quality of today's video games.
The two SOC panel discussions I attended Tuesday and Wednesday were both
standing room only. Tuesday's panel on SOC testing concluded that today's
fault modeling with stuck-at faults is not adequate for some of the faults
being seen in nanometer designs. Wednesday's panel on IP concluded that the
cost of integration and testing of IP often outweighs the IP cost. One stop
shopping for IP simplifies the integration and support problem. The
panelists comments on the question of IP and its support from an EDA vendor
were, "There is no need to bash Synopsys support" and "There is value to
the one stop shopping".
The DesignCon vendor exhibits were an interesting mix. Synopsys was only
represented by their design services group in a small booth against a side
wall rather than their normal central dominant presence. Cadence/Tality was
completely missing. Mentor and Rambus had a large presense. Rambus was the
primary sponsor of this event and their stock price recently doubled! Which
yields the conclusion, sponsor DesignCon, have a large booth and watch your
stock price double!
On a humorous note, a friend of mine at an EDA vendor said "wouldn't it be
great if Synopsys announced that in 18 months they would discontinue all
support of VHDL and be moving all products to System Verilog?". I'll leave
him anonymous, and just think about the implication this would have for the
industry.
- James Lee
The ASIC Group Fremont, CA
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From: Dave Chapman <alpha=dwc omega=goldmountain not calm>
Hi, John,
Here are my thoughts about last week's DesignCon:
Best give-away: A really cool, dangerous mountain climbing stick from iROC,
a French company. Their product was pretty good, too. They have software
which helps to protect against logic soft errors. Kind of like using parity
to protect against memory soft errors.
Best technology: Xanoptix has a hybrid chip packaging technology which
allows you to put a III-V semiconductor wafer (meaning a CERDES, laser, and
photo-diode receiver set) onto a silicon die. How do they do it? I don't
know. What I do know is that this might be the future of high-speed serial
chip interconnects.
Second-best technology: Also from Xanoptix. It's a connector for a whole
lot of fiber. Looks sort-of like an RJ-45 connector, but can have up to 70
or 80 fibers. We need this.
Not exactly news: Vera continues to make slow progress in the IP market.
People who pay actual money for IP are increasingly demanding that it comes
with a testbench. Vera seems to be gaining share over Verilog and Verisity
in this market.
Funny thing: The early brochure for the show had maybe 1/4 or 1/3 the number
of exhibitors who actually showed. Looks like lots of people waited until
the very last minute before deciding to buy a booth.
Only about of 1/3 of the companies were in the EDA design space. A lot of
the rest were connector companies from Back East. My suspicion is that the
show promoters gave away a lot of booths to make it look better, and that a
lot of people came in order to make their mid-winter trip to California
a business expense.
Food item: The first night of the exhibits, they had really good food.
There was a big joint of roast beef, and a guy carving slices off of it,
etc. The second night, we got nasty hot dogs and even nastier hamburgers.
What was that about?
Overall: DesignCon'03 was the best show I've been to since the summer of
2001. People didn't look exactly optimistic, but they didn't look like the
survivors of a Death March, either.
- Dave Chapman
Gold Mountain Consulting Sebastopol, CA
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\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
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