( ESNUG 381 Item 11 ) ------------------------------------------- [11/08/01]
Subject: ( ESNUG 380 #4 ) Formality 2000.11 Is A Year Old; Look At 2001.08
> Chip 2 (Gate2Gate) 4 M gates, flat design:
>
> Time Memory
> -------- ---------
> Avanti Chrysalis 3.0 3596 min 14870 Mbyte
> SNPS Formality 2000.11 112 min 2399 Mbyte
> Verplex Tuxedo 2.0.8.a 89 min 2817 Mbyte
From: "Nathan Bailie" <NBailie@amcc.com>
Hi John -
I noticed that [ Mr. Bigglesworth ]'s comparisons in ESNUG 380 #4 benchmarked
Synopsys Formality 2000.11 vs Verplex vs Chrysalis. That's almost a year
out of date. I have seen *significant* improvement in Formality 2001.06
(an early release of the 2001.08 version) as compared to last year's
2000.11 version. I recently used both versions on individual design blocks
with up to 1 million gates of logic in each. RTL-to-gate comparisons ran
2-3X faster with 2001.06 than with the previous version. Also, 2001.06
breezed through the checking of large complex portions of logic that had
been trouble for 2000.11.
Unfortunately, I haven't compared the results with other tools such as
Chrysalis, Verplex, or FormalPro yet, so I can't offer comparative hard
metrics yet. Of course, speed isn't the only factor in choosing the tools.
I would like to see more information and tool comparisons on the ability
to debug RTL-to-gate miscompares. I know that Mentor Graphics is claiming
advances in this area with FormalPro.
Still, anyone who was disappointed with the performance of Formality 2000.11
should definitely take a look at the newer 2001.08 version.
- Nathan Bailie
AMCC Raleigh, NC
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