( ESNUG 363 Item 1 ) --------------------------------------------- [01/25/01]
Subject: ( ESNUG 338 #1 ) Customer Endorsement Of Chip Architect Retracted
> We decided to look at Chip Architect because of certain key features.
> Like a lot of other folks these days, we also believe that hierarchical
> layout is the way to go. Chip Architect promised a natural way to do
> this, starting not only at the gate level, but the ability to do planning
> at the black box and RTL level, too. The tight integration between
> placement & timing that Chip Architect promised really got our attention.
>
> - Jon Stahl
> Avici Systems N. Billerica, MA
From: Jon Stahl <jstahl@avici.com>
Hi John,
I ran into problems very late in the game with Chip Architect and spent some
time working with Synopsys to try and resolve them, and finally gave up.
I had to use a combination of various other tools to get timing closed and
the design taped out.
For those interested, the major problem that I ran into was involved and may
not still apply: although the placement Chip Architect produced was very
good, it did not completely meet timing and the ECO timing improvement
features of the tool were broken.
I attempted and was able to write a complex script to have Chip Architect do
repeater insertion, but it would only work after I flattened the entire
design (a hierarchical attempt only produced core dumps). This resulted in
timing being met, but led to further misery as the tool only had the ability
to produce a flat netlist from the flattened physical hierarchy and did not
keep separate logical and physical views. This in itself was ugly, but only
a show-stopper when we attempted to run several other tools which couldn't
handle a totally flat netlist for a design of that size.
So my apologies to the community for those doing do diligence on tools and
only seeing my pre-tape-out good news report without the later accompanying
bad news. It took a while for the dust to settle, and my job was to get the
design out.
I have heard that Chip Architect may be re-targeted as a front end to
Physical Compiler (which wasn't available at the time of my original
posting) and priced accordingly, as Synopsys makes it's attempt to produce
a full P&R solution. But we are not currently using the tool.
- Jon Stahl
Avici Systems N. Billerica, MA
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