( ESNUG 355 Item 13 ) -------------------------------------------- [7/26/00]

From: Volker Rzehak <v-rzehak@ti.com>
Subject: ( ESNUG 82 #2 )  How Do I Handle Opposite-Input Tri-states In DC?

Hi, John,

In the "early" days of ESNUG there was a thread talking about a Synopsys
bug concerning the usage of tri-state buffers that have 2 enable inputs
that require opposite logic levels.  I just ran into the same problem
and am trying to find a solution.  Was there a solution posted (that I
didn't find)?

I tried to use the 'pin_opposite' attribute in the library but Design
Compiler failed to map the tri-state buffers.  I tried the 'x_function' with
the same result.  I tried the 'contention_condition' with the result that
Design Compiler mapped the tri-state buffers but tied one input to VCC (as
it did without any special attribute).

I think there must be someone who has solved this problem.

Thank you for your help and your ESNUG newsletter!

    - Volker Rzehak
      Texas Instruments Deutschland              Germany