( ESNUG 343 Item 2 ) --------------------------------------------- [2/16/00]
Subject: Replies To The "Reading EDA Tea Leaves" Physical Synthesis Column
> If you want to know how the five way physical synthesis horse race is
> going, you've got to track what the engineers who actually use such tools
> are saying and, more importantly, the bugs they find. ... Engineers who
> actually use a tool will have some praise and lots of gripes. It's
> human nature. No software is bug free. When you're seeing lots of public
> bug talk about a tool, you truely know that it's being widely used. When
> you see only public happiness and sunshine about a tool; be aware that
> you're the one being used.
From: Joe Hutt <joe@Magma-DA.COM>
Good article John. I think design data is the only way to measure a tool
set. I've spent my whole life trying to figure out the design problems
we're facing now and the amount of chatter is greater now then ever before.
The real test is can you do the design. The only thing is that sometimes
taxi cabs are useful even at Synopsys.
- Joe Hutt
V.P. Engineering
Magma Design Automation
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From: [ One Of The EDA Boys ]
John, please keep me anonymous.
Don't want to start a flame war, but unfortunately, this latest message
from you seems to be just a little bit too much "Synopsys" biased that (for
me) it raises doubts about your integrity. No, I'm not calling you a liar,
it's just that you seem to be getting very close to playing (or getting
deceived by) the same marketing tricks that you have exposed in the past.
Do you really believe that those tapeouts occured without significant
handholding from Synopsys? I don't think so, which means that Synopsys is
as much in taxi-cab mode as anyone else.
As you can see from my e-mail address (which I hope you've erased), I work
at an EDA company that isn't connected to the spin machines of any of the
mentioned companies. I hope to be somewhat unbiased on the place and route
solutions. Given what I've seen, I've reached the follwing conclusions:
1. There is a hell of a lot of hype going around.
2. Customer endorsements are very carefully worded such that they
endorse without actually endorsing. Fujitsu bought into multiple
solutions, but was quoted by one vendor as a major win. TI bought
Magma, but TI still uses other solutions. Mitsubishi supports all
the EDA vendors, yet Cadence cites their support as a major win.
etc. etc.
3. Who is winning technically is not clear.
4. Very few benchmarks seem to have completed.
I am absolutely positive that when some benchmarks have completed, we will
definitely hear about the results from the winning vendor. Since these
benchmark boasts have not materialized yet, we can only conclude that no-one
is in boasting position, yet. The moment you find one, John, could you
please make sure to publish it in ESNUG?
Sorry to rant, but I needed to give you my $0.02
- [ One Of The EDA Boys ]
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> Cadence PKS was believed to be struggling with 3 conflicting timing
> engines between PKS, Qplace, and Pearl. Then, last week in ESNUG 342,
> Jay McDougal of Agilent reported only a 0-3 percent timing error between
> PKS, Qplace, Pearl, and even PrimeTime.
From: Hong Li <hongli@cadence.com>
John,
You made a mistake. It should be two timing engines, PKS and Qplace because
Qplace uses Pearl as its timing engine. There are two engines ONLY if you
run placement outside PKS. Otherwise, there is only one timing engine
because Qplace is also integrated with PKS which uses PKS timing engine in
this case.
Hopefully this clarifies your statement.
- Hong Li
Cadence
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From: Donna Rigali <donnar@cadence.com>
John,
Why is there no mention of the different timing engines with the Synopsys
flow? For instance, Design Compiler uses DesignTime, yet Primetime is the
sign-off engine, and I'm not sure what the timing engine is in PhysOpt or
Chip Architect. In addition, in the case of John Stahl from Avici, Avanti
is the back-end tool so there is a different timing engine between the front
and back-end there. There is also no mention of the 2 different placement
engines between PhysOpt and any back-end tools, which I would think would
have a huge impact on timing closure and predictability.
Yes, there are 2 different timing engines between PKS and Cadence's back-end
tools, but there is a common placement engine and, as the letter from
Agilent showed, the pre- and post- layout correlation was excellent, which
is the end objective.
- Donna Rigali
Cadence
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From: Ian Buckley <ianb@8x8.com>
John,
This is a topic very close to my heart right now and I'm in the middle of
evaluating the bulk of these tools and flows. However you've just confused
me with the following conflicting statements:
"Having said this, here's the early February status of the RTL-to-GDS-II
race. With the exception of Synopsys and Monterey, most of the EDA
vendors (Cadence, Avanti, and Magma) seem stuck in taxi cab mode with
their physical synthesis tools."
"Avanti and a very noisey Magma are playing up vague customer endorsements
in the press, but nothing verifiable of course. Monterey is just a town
in California. These are still taxi cab companies."
So far I've refused to even engage Monterey in evaluation because it seemed
like vaporware to me, so I'm perplexed that you singled it out as being
established (like Physical compiler) in your first comment. Typo?
- Ian Buckley
8x8 Inc. Santa Clara, CA
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From: Mike Kobe <kobe@meltdown.sps.mot.com>
In one paragraph you say that the EDA vendors are stuck in taxi cab mode
except for Monterey and Synopsys. In the next paragrah you say Monterey is
just a town in California that is still in taxi cab mode. We are engaging
with Monterey and Synopsys on physical synthesis. Do have any useful info
on Monterey?
- Mike Kobe
Motorola
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From: Jay Vleeschhouwer <Jay_Vleeschhouwer@ml.com>
John,
In your "bug talk" article, you state first that "with the exception of
Synopsys and Monterey, most of the EDA vendors (Cadence, Avanti, and Magma)
seem stuck in taxicab mode". Later in the article, however, you refer to
Monterey as just a town in California, suggesting that you don't see much
evidence of real customer usage (of Dolphin).
Also, can you elaborate on why you think Synopsys is 6 months ahead of PKS?
I spoke with one large semi company yesterday who suggested the reverse.
- Jay Vleeschhouwer, Analyst
Merrill Lynch New York, NY
[ Editor's Note: Sorry for the semantic error in my column concerning
Monterey. What I was trying to describe was a pack where Cadence,
Avanti, and Magma were all in taxicab mode with Synopsys & Monterey
outside of that pack -- Synopsys being 6 months ahead of the pack and
Monterey not even appearing in the race. Sorry. (BTW, I just heard a
rumor this week that Monterey was running into funding problems, too.)
To Jay: you might want to reread [ One Of The EDA Boys ]'s letter above
where he says: "Customer endorsements are very carefully worded such
that they endorse without actually endorsing. Fujitsu bought into
multiple solutions, but was quoted by one vendor as a major win. TI
bought Magma, but TI still uses other solutions. Mitsubishi supports
all the EDA vendors, yet Cadence cites their support as a major win."
You should be aware that on-going, behind-the-scenes business deals
(most of which don't even involve physical synthesis) make it trivial
to get such "customer quotes" for a press release or article, Jay.
Knowing this, I wrote my "track bug talk / ignore everything else"
column to teach readers how I read the industry. Deal only in hard
data and with people who ACTUALLY use the tool. That being said, I
*know* nVidia and Matrox have used PhysOpt to tape-out chips. I've
*personally* talked to their engineers and I've read their no-bullshit,
warts-and-all reviews of PhysOpt -- hence, I *know* PhysOpt is real.
And that data was from 4 months ago. ( See ESNUG 335 #1 )
When I was writing that column, I phoned Jeff Roane, the Cadence PKS
marketing bigwig, and asked if he had any PKS tape-outs yet. He said
"No." I said he should get some. He replied "Tell me something I don't
know!" And I got no real hint from him as to when one would be coming.
So that means Jeff probably won't have a PKS tape-out for at least
another month or two; unless he rigs a fake one (which I don't think
he'd do; too dangerous if exposed). Hence my reasoning was that
Synopsys was 4 months (currently known) + 2 months (probable) = 6 months
ahead of Cadence in physical synthesis. Feel free to agree or disagree
with my assessment, Jay. I'm just telling you what *I* see in the hard
data. I could be wrong; but in my gut, I don't think I am. - John ]
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