( ESNUG 340 Item 2 ) --------------------------------------------- [1/19/00]

Subject: ( ESNUG 339 #1 )  We Also Script Homebrew IPO Buffer Resizers

> One of the biggest roadblocks was that we were unable to run DC IPO to
> our satisfaction.  It took many days to run (on 360MHz UltraSparcs),
> was repeatably crash-prone, and didn't produce good results.  (We tried
> both 98.08-1 "normal" IPO, and 99.05-2 Floorplan Manager IPO).  ...
> I wrote a program that reads the Primetime output and upsizes gates
> whose individual delays exceed user-specified limits.   That is, it
> looks for and speeds up all the slow gates in the failing paths.  ...
>
>     - Jeff Winston
>       Maker Communications,                       Framingham, MA


From: Stefan Thiede <Stefan.Thiede@sv.sc.philips.com>

Hi John,

Since the days of JTAG we've been using Pearl/Primetime w/ some "scripting
glue" to fix everything that can be fixed by buffer insertion and cell size
changes.  Thank Jeff for this and I'll have a look to see how he does it.

    - Stefan Thiede
      Philips Semiconductors                      Sunnyvale, CA

         ----    ----    ----    ----    ----    ----   ----

From: Mike Naum <Michael.Naum@East.Sun.COM>

Hi John,

Interesting that Jeff posted this.  We've been using this very same approach
here at Sun for 4 years.  Actually it started back in the Motive days and
we migrated it to Primetime.  Our program was written in Perl and is
optimized for LSI and Lucent.

We have applied it onto multi-million gate, very high frequency ASICs and
it's worked everytime.  We also wrote this nifty Perl program to handle the
hierarchical netlist changes.

In our flow we can either run the vendor's delay calculator or use Synopsys
set_load's.  With set_load's we have a faster flow that we can iterate until
we meet timing, automatically writing out new netlists and re-timing them
along the way.  When we are finished we verify with an SDF.  We've even
taken our scripts to the next level by integrating it deeply with Avanti
P&R.  Our ECOs flow with Avanti hold placement and routing remaining the
same.  We're basically swapping the cells in and route to the altered
footprints.

Thi process works very good for us.  So much for Synopsys solving all of our
problems!  Sometimes the simple solutions are best.

    - Mike Naum
      Sun Microsystems                                Burlington, MA



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