( ESNUG 316 Item 16 ) ---------------------------------------------- [4/8/99]
Subject: ( ESNUG 315 #1 ) Collett Defends His VHDL Record; Cooley Rebutts
> Editor's Note: I just have one question, Cliff. I noticed you're citing
> Ron Collett in your letter. Is this the same Ron Collett who predicted
> the utter & grave demise of Verilog so many years ago? :) - John
From: Ron Collett <ronc@collett.com>
Hi John,
I write to you to clear up a misunderstanding regarding the issue of of
VHDL vs. Verilog. I periodically run across statements that you make that
are fundamentally inaccurate regarding projections that I made many years
ago regarding Verilog and VHDL. First, never did I predict the "demise"
of Verilog, as you have stated. This is well documented. I would be more
than happy to show you newsletters that I wrote in which I had predicted
co-existence, as well as my column in EE Times in May 1994 in which I
reiterated this. So it is patently false to say that I predicted VHDL would
displace Verilog. I would appreciate it if you would discontinue this
dissemination of false information.
Here is what actually occurred. I had always predicted that there would
be more VHDL users than Verilog users. This is absolutely true today.
That is, there are in fact more VHDL users than Verilog users -- however,
the revenue from EDA tools is heavily weighted toward Verilog (approx. 2:1).
Indeed, at one time I had thought that the revenue for VHDL-based tools
would significantly outstrip that of Verilog -- this was based on an
assumption that the average-selling prices of the VHDL-based tools would
parallel those of Verilog. This did not happen -- a half dozen EDA companies
ended up introducing VHDL simulators with practically no differentiation
among them, so the Average Selling Price of these products plunged. I
clearly missed this. It is always very challenging to predict the supply
side of the equation -- e.g. few people anticipated that today there would
be 10 physical library vendors offering similar libraries all competing for
the same business.
Anyway, the number of VHDL users worldwide today is in fact larger than
Verilog, but certainly not in the industry segments that were the first
users of Verilog (i.e. computer and semiconductor). For example, in the
communications industry it is split, and in most other industries it is
heavily weighted to VHDL (e.g. Defense/Aerospace, Industrial Control, Medical
Electronics, etc.). Europe of course is heavily VHDL. Part of our firm's
business is to have a firm quantatitive understanding of HDL language usage,
so we have collected enormous quantities of statistically valid data on
this.
In ESNUG 286 #1, Clay Degenhardt of System Science writes:
> Thought I'd pass along some thoughts after reading your article "From
> Beirut to Bosnia" posted on techweb.cmp.com as I was searching for
> references to Collett International (Ron Collett).
>
> Before coming to Systems Science, I worked for Zycad over 6 years. Ron
> was contracted and, as a stipulation, would speak to the company about his
> vision of the simulation-environment-of-the-future. Ron assuredly promoted
> the demise of Verilog in favor of the upcoming contender, VHDL. On that
> advice, Zycad's executives based the future of the company on a hardware
> engine (ViP) designed to digest raw VHDL in preparation to capture the VHDL
> market which was prophecized to take over by '96. Because of this huge R&D
> investment, Zycad was fatally crippled and by the time they backtracked to
> update the successful gate-level simulator (Paradigm XP, Lightspeed), they
> had already lost momentum and could no longer invest in the resources
> necessary to regain lost ground.
>
> After my first experience hearing Ron's presentation, I was always
> very skeptical of his market analysis. In 1996, it hit directly in my
> realm when he avoided the VHDL-versus-Verilog topic and began to harp on
> the demise of the workstation platform in favor of NT.
>
> - Clay Degenhardt
> Systems Science
As for the ex-Zycad guy last year that wrote to you regarding his opinion
about how I tanked Zycad because of my VHDL projection, it too was
completely inaccurate. I spoke to him about it. He apologized profusely.
I also mentioned it to a couple of ex-Zycad executives and they laughed.
They confirmed that if they were able to get their VHDL accelerator finished
on time and kept its performance 10X ahead of the general purpose
workstations, the product would have been very successful -- they would
have been able to sell it to ALL of the major VHDL user companies. I
believe this is true. The fact is that the problem was their inability to
create such a product. When I was providing Zycad with analyses, the
assumption was that they would be able to provide such a product.
Anyway, I will always accept responsiblity for the conclusions that I reach,
which is why my firm always provides our clients with all of the assumptions
in the models we develop. By doing this, our clients fully understand what
the models are based on, and they can formulate their own conclusions if
they wish. I would never represent that we are perfect, but having been
doing this now for quite some time, I have found most of our models and
analyses to yield accurate results.
Thank you for your consideration.
- Ron Collett
Collett International Santa Clara, CA
---- ---- ---- ---- ---- ---- ----
Editor's Note: I'm going to do something I usually don't do, Ron. Since
we both buy ink by the barrel (i.e. we're both EE Times columnists and
we're both big boys capable of hearing public criticism of our ideas),
I'm going to rebut your letter here and now. Here goes.
Have you ever been involved in any political campaigns, Ron? You know,
writing catch phrases and doing spin control for your candidate when
they say a gaffe that loses votes?
When I read your letter above, to me, you appear to be attempting to put
a new spin on your role in the olde Verilog/VHDL wars. During the '91
to '95 timeframe, you were very active at many conferences and your
VHDL-Will-Beat-Verilog "data" was part of almost every non-Cadence EDA
vendor's presentation then. I remember sitting with Dan Pinvidic in the
first or second SNUG meeting eight or nine years ago wondering why in hell
we were seeing all the Synopsys synthesis examples given in VHDL. When
we balked, we were told your "data". I remember being at DACs, OVIs, and
VIUFs seeing your "data" in all sorts of EDA vendor pitches within that
timeframe. VIUF officers, like Hillel Ofek, would gleefully quote you.
And OVI officers, like Bill Fuchs, would very vociferously dispute your
"data", and how it was collected. Your VHDL-will-beat-Verilog prediction
was *everywhere*.
"Ofek, Smith and Collett agreed that Verilog is here to stay, but noted
that VHDL is growing much faster. Collett predicted that the VHDL and
Verilog simulation markets will be roughly equal in 1994, and that
toward the end of the decade, the HDL market will be around 60 percent
VHDL and 40 percent Verilog."
- from "Outsold by Verilog" by Richard Goering, EE Times, 5/2/94
"As a Dataquest analyst in 1991, Ron Collett, now president of Collett
International, predicted VHDL would overcome Verilog in revenues and
seats in 1992. Collett believes he's still right about seats, but he
said the revenue forecasts were thrown off by competitive price
pressures. "It would be a complete miscalculation to say Verilog is
eclipsing VHDL in terms of market adoption," Collett insisted."
- from "HDL Numbers In Dispute" by Richard Goering, EE Times, 2/5/96
NOTE: Goering says in 1991 you predicted "VHDL would overcome Verilog
in revenues and seats in 1992". *** THIS WAS MY KEY POINT. ***
When Gary Smith took your job at Dataquest, his initial essential "data"
(predictions) stayed the same with the moot point being exactly *when*
VHDL revenues would bypass Verilog revenues. (See pg. 41 of the 3/14/94
EE Times to see a revised Dataquest chart showing the "crossover point"
of VHDL sales beating Verilog sales "moved to 1995".)
You kept supporting the essence of your VHDL-will-prevail prediction even
when Viewlogic bought Chronologic.
"Viewlogic's acquisition is a good strategic move, in the view of
analyst Ron Collett, president of Collett Associates (Santa Clara,
Calif.). "All of our analyses indicate that the current Verilog user
base is remaining extremely loyal to Verilog," Collett said. "It makes
sense for an EDA vendor to offer a strong Verilog product portfolio."
Nonetheless, Collett said, "that doesn't change the fact that the vast
majority of new HDL adopters are going to VHDL at this point in time."
- from "Viewlogic To Acquire Chronologic" by Brian Fuller and Richard
Goering, EE Times, 4/4/94
I even quoted your VHDL-to-kill-Verilog prediction in an EE Times column.
"Back when he was a Dataquest analyst, Ron Collett of Collett
International made news by predicting that VHDL was going to beat
Verilog some time around 1992. Gary Smith of Dataquest also caused a
minor uproar when he claimed at the 1994 Design Automation Conference
that VHDL revenues were just starting to beat Verilog revenues and
that it would only get better for VHDL."
- from "From Beirut to Bosnia" by John Cooley, EE Times, 2/5/96
In my DAC'94 review that I wrote for EDN magazine, I even took a zing at
you for your VHDL-Uber-Verilog prediction.
"MOST PERSONALLY GRATIFYING DAC PANEL: The HDL Summit. Ron Collett
moderated six panelists ranging from Verilog bigots to people using
both to VHDL bigots. As usual, Collett tried to conclude the panel
with his spin that VHDL was where everyone was going, etc. Just to
annoy him, I pointed out how, years ago, a researcher at Dataquest had
made a now-embarrassing prediction that VHDL users would outnumber
Verilog in early '92; a prediction that turned out to be greatly
exaggerated. That Dataquest research-er was Ron Collett."
- from "DAC'94 & The Grateful Dead" by John Cooley, EDN, 7/7/94
The reason why I'm belaboring these points with public records, Ron, is
to show how you really were integral to the anti-Verilog movement at
that time. As an EDA user, your Verilog-Is-NOT-Where-It's-At "data" was
throw at us again and again and again in those years. While through some
legalist interpretation of your quotes and your letter above you may
*technically* be correct in that you did not predict the *absolute*
extinction of Verilog -- during that '91 to 94 timeframe, your quotes and
data gave me (and a lot of other engineers) the *impression* that we'd
be complete idiots to keep designing using Verilog.
A few days ago, Ron, I went through a McDonald's drive through. I ordered
two cheeseburgers and one hamburger at the speaker. When I drove to the
cashier (a pimply faced high school kid) I was given a Big Mac and fries.
When I told him about the mistake, he said: "Oops, I goofed! Got the
orders mixed up. Sorry, Sir. It's completely my mistake! Let me fix
that for you!". He completely owned his error.
And that kid probably makes a little over minimum wage.
How many millions are you worth, Ron? Multi-millions? And you're *now*
telling me: "First, never did I predict the 'demise' of Verilog, as you
have stated. This is well documented. ... So it is patently false to
say that I predicted VHDL would displace Verilog. I would appreciate it
if you would discontinue this dissemination of false information." Yet
all sorts of quotes clearly point out that "As a Dataquest analyst in
1991, Ron Collett, now president of Collett International, predicted VHDL
would overcome Verilog in revenues and seats in 1992." (Goering, 2/5/96)
And you won't simply just own this mistake. Instead it's equivocations,
very close legal readings ('demise' is not equal to 'overcome'), and the
likes.
This is sad, Ron, really sad.
- John Cooley
the ESNUG guy
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