ESNUG's been around for over seven months now and, prior to the EE Times
  article, we had a readership of about 800 Synopsys users (who found
  out about ESNUG either through Internet or word of mouth.)  After that
  one little article, though, I'm happy to announce that ESNUG's readership
  is now a little over 1000 Synopsys users!

  If you're reading ESNUG for the first time, welcome! 

  We're a grass-roots colaboration of Synopsys users wanting to be to
  warned about bugs & workarounds other users are seeing instead of
  being left in a vacuum.  In addition, we discuss design methodologies,
  simulation strategies, ATPG and even job openings at companies.

  So, if you discover something useful that you think other Synopsys
  users might be interested in - or even if you're sending a bug to the
  Synopsys hotline and would like other users to be warned - or have a
  solution to someone's problem as presented on ESNUG, send a copy 
  to me at: "jcooley@world.std.com" and it'll appear on ESNUG.

  (And, as always, you have the option to post on ESNUG anonymously.)

                                         - John Cooley
                                           ESNUG Moderator


( Post 92  Item 1 ) ----------------------------------------------------

From: irwan@Eng.Sun.COM (Irwan Sidharta)
Subject: ESNUG Post 91: 'How "characterize" Command Really Works'

Most useful info, John!  This kind of info directly hits home and we 
appreciate it much.  Bravo ESNUG!

Irwan Sidharta
Sun Micro


( Post 92  Item 2 ) ----------------------------------------------------

From: Marco.Rubinstein@eua.ericsson.se (Marco Rubinstein)
Subject: "group" command trouble


I have lately been using synopsys to build clock trees. The general 
outline is :

   1) Report cell & hierarchy structure
   2) Create a "regroup script" from the information in 1)
   3) Flatten the design completely.
   4) Relax the dont_touch constraints on the clocks and build 
      trees using compile -incremental.

   5) Regroup the hierarchy using the script from 2)

The trouble is in part 5). When the design is being regrouped the 
tool crashes reporting that some cell name is already used and 
thererfore a cell with the same name cannot be grouped. Crash!

The log is:

  Performing group on cell 'SNR/D2/U703'. 
  Performing group on cell 'SNR/D2/U702'. 
  Performing group on cell 'SNR/D2/U701'. 
  Performing group on cell 'SNR/D2/U700'. 
  Performing group on cell 'SNR/D2/OEF_REG'. 
  Performing group on cell 'SNR/D2/STATE_REG'. 
  Warning: Cell SNR/U876 not added to design DETECT_OUT_S_ENK_TEST_1 
           because a cell with that name already exists. (DDB-1)

  Fatal: Internal system error, cannot recover.


The command which started the grouping is :

group "USC2K_APPL/SNR/D2/*" -design_name DETECT_OUT_S_ENK_TEST_1 
       -cell_name " S1/DETECT_OUT_S_ENK_TEST_1 "

Has anyone encountered or solved this problem?

  Marco Rubinstein
  ELLEMTEL Stockholm Sweden


( Post 92  Item 3 ) ----------------------------------------------------

From: johns@emavp22.webo.dg.com (John Spillane)
Subject: Sum of Products from a "case" statement

I'm trying to have synopsys create a simple sum of products 
design from a case statement and not take out the cover terms. 
(It's really an async state machine). I just can't get the tool
to create this type of simple design. Does anyone have any ideas??

  John Spillane
  Data General


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