( DVcon 05 Item 17 ) -------------------------------------------- [ 10/25/05 ]
Subject: Synopsys PCI, Verisity AMBA, Denali DDR, nSys PCI, ARM
NO CHANGE -- In 2004, 48% of users said they don't use verification IP.
In 2005, 47% of users said they don't use verification IP. Yawn.
2005 - "Does your company use verification IP? For which protocol?
USB, PCI, FireWire, Ethernet, AMBA, 1394? Whose IP do you
use? Verisity? Synopsys? Denali? Cadence? Mentor?"
don't use : ############################################### 47%
Synopsys total : ############################## 30%
AMBA/AHB/AXI : ####### 7%
PCI/PCIe : ########### 11%
USB : ##### 5%
Ethernet : ## 2%
1394 : # 1%
memory : # 1%
FireWire : # 1%
I2C : # 1%
PowerPC : .5%
GMAC : .5%
Verisity total : ###################### 22%
AMBA/AHB/AXI : ########### 11%
PCI/PCIe : #### 4%
USB : ##### 5%
Ethernet : ### 3%
1394 : .5%
SATA : .5%
HyperTransport : .5%
Denali total : ##################### 21%
AMBA/AHB/AXI : # 1%
PCI/PCIe : ######### 9%
USB : .5%
memory : ########### 10%
Mentor total : ## 2%
0-In : # 1%
USB : .5%
Ethernet : .5%
nSys PCI : ###### 6%
TransEDA PCI : # 1%
Avery Design PCI : .5%
Altera/Xilinx : ### 3%
ARM : ## 2%
Again, remember these are MINDshare numbers. There's a lot of information in
this table above. It says if you had 100 engineers in one room, 47 are not
using any commercial verification IP whatsoever, 22 are using some type of
Verisity IP, 5 are using Synopsys USB IP. Curious about their AMBA/AHB/AXI
use? That's 7 Synopsys + 11 Verisity + 1 Denali + 2 ARM = 22 users out of
the 100. Want to know the Denali slice of the PCI/PCIe space? It's 9 Denali
vs. 11 Synopsys vs. 4 Verisity vs. 6 nSys vs. 1 TransEDA vs. 0.5 Avery Design
of the 100 engineers in the room. There's all sorts of data there.
Also interesting was how engineers used verification IP changed this year:
2004 - "Is the IP used for reference checking only, bus-functional
modeling (BFM), or to measure coverage of the standard as well?"
BFMs : ################## 53%
reference checking : ########## 31%
standard coverage : ############## 42%
2005 - "Is the IP used for reference checking only, bus-functional
modeling (BFM), or to measure coverage of the standard as well?"
BFMs : ########################### 79%
reference checking : ###################### 65%
standard coverage : ####### 22%
Why the uptick in BFM and reference checking use? Why the drop in standard
coverage use? I don't know. You tell me.
And of course, like last year, there were the usual number of users who had
nothing but distrust for verification IP...
I do not use verification IP at this time. The biggest issue with
verification IP is confidence in the IP itself.
- Cliff Cummings of Sunburst Design
Generally no. I am constantly amazed by how verification IP companies
(in fact Verilog IP companies in general) appear to think that they
cobble some rubbish together and try and demand very large fees.
Some that I have looked at in the past don't work, don't match the
standard or can't be applied to the environment I have.
- [ An Anon Engineer ]
We've looked at most of them and passed -- either not specific
enough for us, or we knew we could do better ourselves.
- Tom Moxon of Moxon Design
Not much. We use DesignWare memory models for discrete memories that
are too difficult/error prone to write up by hand, but the cost to
deploy VIP across our entire server farm is prohibitive. We are a
Fibre Channel company, and have developed our own internal VIP that is
much more reliable than anything we've seen offered externally.
- Jonathan Craft of McData Corp.
I've had some experience of PCI and USB 1.1 verification IP from the
days before Synopsys bought InSilicon; it worked well enough, but I
wasn't hugely impressed with the quality (although I had a similar
impression of their hardware IP which came with the verification
models). It might have improved since, although I've heard rumors to
the contrary.
- [ An Anon Engineer ]
No.
- Frank Vorstenbosch of Telecom Modus Ltd.
Our past experience with models from Verisity and Synopsys have
not been positive.
- [ An Anon Engineer ]
We have seriously considered buying it a couple of times (Synopsys
DesignWare). However, typically the models are not provided with
source code - what happens if we find a particular error condition
that the model can't reproduce?
Also, by writing the verification IP in house, it allows our guys
to get up to speed with the standard in question. You have to
really understand something to test it.
- [ An Anon Engineer ]
Not today.
- Dan Joyce of Hewlett-Packard
Yes. PCI, PCI Express. We use it for checking and BFM. I see us
moving to using it for coverage in the future.
- [ An Anon Engineer ]
No.
- Tom Mannos of Sandia National Labs
We use PCI-Express verification IP for bus monitoring, assertions, and
compliance checking. We've used both Avery Design & Synopsys DesignWare.
We test drove TransEDA & Denali.
- Dan Steinberg of Integrated Device Technology
Yes, our company used VIP. The protocol of VIP have SATA, PCI, PCIE-E,
GMAC, I2C, USB, 1394, DDR, others... The IP providers are TransEDA and
Synopsys.
- [ An Anon Engineer ]
We use mainly eVC from Verisity: AMBA, Ethernet, USB. We also have
internally developed VIP.
- Olivier Haller of STMicroelectronics
We use the Synopsys DesignWare AMBA verification IP. Used for reference
checking and BFM only.
- [ An Anon Engineer ]
Synopsys DW AMBA VIPs and VIPs from IP vendors such as ARM. They are
used mainly in functional verification.
- Peng Hong of Datang Microelectronics China
Yes, AHB, PCI Express from Verisity
- [ An Anon Engineer ]
We use Denali suites for PCI Express.
- Dave Ferris of Tundra Semiconductor
We were using PCI/X verification IP from Synopsys for BFM and reference
checking, but when Synopsys changed it's policy and required users buy
the full DesignWare library we took it off maintenance. We have found
bugs, but can work around them and it has general worked well.
- [ An Anon Engineer ]
PCI, PCIX mainly. BFM and as assertions. We used Denali.
- [ An Anon Engineer ]
Yes - we using Denali verification IP for a PCI Express core.
We use as BFM, conformance test suite, coverage of standard.
- Jim Wylie of Unisys Corp.
Yes - USB, AMBA, 1394. Reference checking, BFM and coverage.
Verisity eVC models worked well for us.
Synopsys ieee1394a_fx was difficult to control.
- [ An Anon Engineer ]
PCI-Express : Denali/PureSpec
We use as an endpoint BFM and a transaction monitor. I think PureSpec
is one of the useful tools, because it has the full spec capability of
PCI-SIG compliance. It is very easy to modify the configuration of
the BFM and to make PureSpec initiate any user specific packets (except
for few error injection case), and it also reports enough information
during simulation for debugging our logic.
- Masato Inogai of Fujitsu
No
- William Mills of Northrop Grumman Corp.
Yes, we use verification IP. Using them for all that you mentioned.
We have IP from Denali, and some "freeware" IP from the Verisity
Verification Vault for HyperTransport.
- [ An Anon Engineer ]
We've used Verisity eVCs for Amba and Ethernet. We used them for
protocol checking, coverage, and stimulus generation.
- George Gorman of LSI Logic
Our group doesn't use any verification IP.
- [ An Anon Engineer ]
USB, PCI, PCI-X, PCI-EXPRESS. IP is used for bus-functional modeling,
reference checking, and standards coverage. Synopsys, Denali.
- [ An Anon Engineer ]
PCI Reference, BFM & monitors. Xilinx, Altera, Denali & 0-In.
- [ An Anon Engineer ]
No.
- Ross Smith of NuCore Technology, Inc.
In the past we used some verification IP (e.g. IIC) from other design
groups with the corporation but no 3rd party verification IP. That
probably has to do with the fact that the interface/protocol of our
past designs is mostly proprietary.
- [ An Anon Engineer ]
We use Synopsys DesignWare VIP for AMBA. This is used for BFMs.
- [ An Anon Engineer ]
Yes. Verisity AMBA. Reference checking and BFM.
- Menno Lindwer of Philips Semiconductors
Yes. We use some Specman eVC from Verisity for some bus protocol
as reference checkers, BFM and to measure coverage.
- Pascal Gouedo of STmicroelectronics
We did use memory models (IP) from Duolog. Apart from that I dont see
much usage within our team.
- [ An Anon Engineer ]
In the past we used Denali IP to check our DDR interface, that was
critical in getting it right.
- Jean-Paul van Itegem of Philips Semiconductors
We are using Verisity's AMBA eVC, also looked into the Synopsys AMBA
DesignWare VIP. Cool job done by Verisity. DesignWare VIP is far
away from the expected quality level (bugs, etc)
- Michael Roeder of National Semiconductor GmbH
Yes. We're using Denali's PCI Express tools. Mostly used for
compliance.
- [ An Anon Engineer ]
Started with SNPS DW PowerPC model; wanted to run bus cycles for
timing, code for HW/SW integration testing. Found it difficult to
install and use; put it on back-burner months ago.
Used the SNPS FireWire IP (core and verification models) in a previous
life. Despite a few quirks, we made and verified a working ASIC, so
it was adequate on the bottom line.
- Jan Johnson of Rockwell Collins, Inc.
AMBA - verisity - BFM
- Karthik Kandasamy of Wipro
We use a combination of internal verification IP and Synopsys DW; we
are about to buy (yes, the buy-build pendulum has swung) third party
verification products.
- [ An Anon Engineer ]
No. We have some in-house stuff, but mostly use full host/slave models
for USB, AMBA, etc, and the odd BFM here and there...
- Michiel Vandenbroek of China Core Technology Ltd.
Yes, we use verification IP. In my group, we use Ethernet IP. We
tend to home-brew our verification IP when possible. We use VC-e's
(Verisity "e" based).
- Juan Carlos Diaz of Agere Systems
Index
|
|
