( DVcon 05 Item 15 ) -------------------------------------------- [ 10/25/05 ]
Subject: Cadence Palladium, Verisity Axis, Mentor IKOS/VStation/Celaro
CADENCE CONQUERS ALL -- It's damn hard to sell emulators/accelerators to
hardware designers. "We'd much rather make our own with FPGAs, thank you!"
or "No, thanks." That's 76% no's. Last year it was 72% no's. Tough crowd.
2004 - "Does your company use HW emulators/accelerators like Cadence
Quickturn Palladium, Mentor IKOS/Meta Systems, Verisity Axis,
Tharas, Pittsburgh Simulations, EVE, or Aptix?"
don't use : ########################## 52%
homebrew with FPGAs : ########## 20%
Cadence Palladium : ###### 11%
Verisity Axis : #### 7%
Mentor IKOS/Celaro/Vsta : ### 5%
EVE ZeBu : # 2%
ProDesign : 0%
Aptix : ## 4%
Tharas Hammer : # 2%
Pittsburgh Sim : 0%
Alatek : # 1%
2005 - "Does your company use HW emulators/accelerators like Cadence
Palladium, Mentor IKOS/VStation/Celaro, Verisity Axis, Tharas,
Pittsburgh Sim, EVE ZeBu, Aldec Riviera-IPT, ProDesign, or Aptix?"
don't use : ############################### 62%
homebrew with FPGAs : ####### 14%
Cadence Palladium : ####### 14%
Verisity Axis : ### 5%
Mentor IKOS/Celaro/Vsta : #### 8%
EVE ZeBu : ## 4%
ProDesign : # 1%
Aptix : # 1%
Tharas Hammer : 0%
Pittsburgh Sim : 0%
Aldec Riviera-IPT : 0%
Skim off those 72% no's and you get the 2004 emulator/accelerator use.
2004 - Cadence Palladium : ################### 39%
Verisity Axis : ############ 24%
Mentor IKOS/Celaro/Vsta : ######## 16%
EVE Zebu : ### 5%
Tharas Hammer : ### 5%
Aptix : ####### 13%
Alatek : # 3%
Pittsburgh Sim : 0%
Skim off those 76% no's and you get the 2005 emulator/accelerator use.
2005 - Cadence Palladium : ############################## 59%
Verisity Axis : ########## 20%
Mentor IKOS/Celaro/Vsta : ################ 31%
EVE ZeBu : ####### 15%
ProDesign : ### 6%
Aptix : ## 4%
Tharas Hammer : 0%
Pittsburgh Sim : 0%
Aldec Riviera-IPT : 0%
Holy moley! Cadence Palladium jumped waaaaaay up from 39% to 59%! Whoa!
And since Cadence acquired Verisity, you can add that 59% + 20% = 79% true
Cadence mindshare. Mentor jumped 2X! Tiny EVE ZeBu up 3X! Whoa! Putting
it in perspective, 75% of engineers do NOT use emulators/accelerators, but
those who do use those 3 brands of them are using them more.
It doesn't surprise me that Pittsburgh Sim was a 0; their website hasn't been
updated since 2003 so my guess is that they're out of business. And I can't
explain that Tharas drop from 5% to 0. At the last DAC they yarped about
getting $5.5 million in fresh VC funding and are actively hiring people, so
their 0 must be one of those statistical things.
We use Cadence Palladium. Once all the scripts are written, setup is
not that difficult.
- Samuel Irlapati of Unisys
We have a Palladum PD2. We like it and have used it on 5 ASIC's. We
get lots of work accomplished because of the Palladium.
- Tom Paulson of Qlogic
Cadence Palladium. Accelerator are really good. Their usage is
really depend upon what you want to acheive. They will be very useful
is some cases and useless in others. But for cases they are useful
they really ACCELERATE the work.
- [ An Anon Engineer ]
One group in our company used a Palladium. They had super results
until the entire group was laid-off. I don't think it had anything
to do with the Palladium, but I can't help but think that the $1 Mil
price tag stuck their neck out when it came time for the bean
counters to make the not-so-tough decision.
My group selectively prototypes on an off-the-shelf Xilinx board.
It's so cheap you can put one on every desk, but it's less plug and
play. You can't do everything on a Xilinx and it definitely happens
slowly, but it's often enough.
- [ An Anon Engineer ]
Hey we are an FPGA company we emulate our designs in our own devices.
We eat our own dogfood.
- Ian Perryman of Altera
We are using Mentor VStation. And we had tried Aptix, but it is very
bad. These HW accelerators are just useful for zero-delay simulation,
not for back-annotation simulation. It's not enough!!
- Jiye Zhao, Chinese Academy of Sciences
We use Cadence's Palladium box. It gets the job done -- except for
asynchronous cases. The setup time to accelerate or emulate has
been ~1 day for one who doesn't know the IP under test that well.
It has been shorter when we know the IP better.
- [ An Anon Engineer ]
No. We do some FPGA emulation though.
- Brad Sonksen of QLogic
Just recently got Palladium system to replace the old QuickTurn. Use
to have IKOS. I think IKOS was better/faster, but then again money
talks and perhaps we don't get the most out of Palladium yet.
- Jean-Paul van Itegem of Philips Semiconductors
No, but we do some FPGA prototyping.
- [ An Anon Engineer ]
Yes, Cadence/Palladium, Mentor/Celaro, and QuickTurn/CoBalt. Cobalt
is the fastest tool, but it is the most difficult tool to debug
(error locate) from its simulation result. For Celaro, there were
many trouble caused by tool bugs.
- Masato Inogai of Fujitsu
We use FPGA prototype boards from DINI, et.al. For large projects we
use ZuBu product from EVE.
- [ An Anon Engineer ]
HW Accelerators -no. (Although I'm one of the patent authors on IBM's
EVE-II accelerator.)
- Elchanan Rappaport of Lynx Photonic Networks
Use Palladium. Awkward setup - limited I/O for debugging. Essential
for large system simulations; definitely better than trying to build
a custom FPGA PCB model.
- [ An Anon Engineer ]
We use Verisity/Axis. The tool is relatively easy to setup and
operate. We've used it for in-circuit emulation on several projects
successfully.
- [ An Anon Engineer ]
Yes. We use Palladium boxes. We love them for our verification
regression runs with large regression runs like Microsoft DCT tests.
Very useful but still a little expensive. I think setup time is
probably 1-2 months for a new design to find the right seed
and everything else.
- [ An Anon Engineer ]
We are using Celaro. We have special people to handle netlist
generation and mapping so it is effortless for me. It is really
useful when simulating and debugging whole applications.
- Pascal Gouedo of STmicroelectronics
We dont use them, but roll our own with FPGA based cards
- Bill Dittenhofer of Starkey Labs
No
- Marshall Johnson of Movaz Networks
We used Palladium. Required lot of effort from our company to clear
bugs with it.
- George Matthew of SiNett Corp.
We are working on a Palladium design now. With 2 Gig Linux boxes these
seem to be a bit outmoded though. Typically used for gate-level sim, but
the hard part is using them to debug. For that you need to get back to
VHDL/Verilog.
- [ Kenny from Southpark ]
We use our own FPGA boards for emulation.
- Jeff Clark of Starkey Labs
We use emulation with FPGA methods, not production emulators. As a
system company (i.e. providing host drivers), it is simply not possible
to loan a Palladium to a customer for a month to find their particular
installation's idiosynchracies.
- Jeff Koehler of Ammasso, Inc.
We use internal FPGA boards - much better and faster.
- [ An Anon Engineer ]
No. Probably build in FPGA.
- Sandro Pintz of Portal Player, Inc.
No, we use our own cheap FPGA platforms.
- [ An Anon Engineer ]
We do not. I have used Quickturn emulation and Axis acceleration
in the past. Emulation is like putting a man on the moon. Axis
was great, if you have access to 100's of FPGA P&R licenses.
- Andrew Peebles of Cortina Systems
No hardware accelerators here. We do use Carbon Design's tool,
which is marketed as a competitor to these, even though it is not
a "hardware" accelerator.
- John Zook of Stargen
EVE ZeBu. For some applications, it is useful. For some other
application, it is not useful.
- [ An Anon Engineer ]
Using Cadence Palladium and EVE Zebu board.
- Sylvain Boucher of Philips Semiconductor
We use Cadence/Mentor/Verisity.
- [ An Anon Engineer ]
We use plain old FPGA's - compile the design for an FPGA prototype
and run real video thru it in real time. Often the emulators and
accelerators don't have the hooks required to do this, so we just
lash up a group of FPGA ourselves.
For the $30K+ for a single accelerator I can put a real PC board
on each engineers and programmers desk.
- Tom Moxon of Moxon Design
No. We've looked at Cadence acceleration and also done in-house evals
of 2 others on your list. In those two cases we found the speed-up to
be only 50-70% of what was promised as worst case improvement. So a
3X promised increase turned out to be 1.5X-2.1X. Granted, that's still
an improvement, but not enough to get management's financial buy-in.
- [ An Anon Engineer ]
No. But we do a home grown emulation using FPGAs.
- Dan Joyce of Hewlett-Packard
We evaluated IKOS for time-consuming simulations (gate-Level). Now
CPU performance in 64 bits Linux machines is so impressive that we
would not need it.
- Juan Carlos Diaz of Agere Systems
We do not, but would like to. Usual problem is high cost of
acquisition and long setup time.
- [ An Anon Engineer ]
Used Aptix in a previous project and decided to not use them again.
We now build our own emulation platforms.
- [ An Anon Engineer ]
No.
- Dave Ferris of Tundra Semiconductor
No HW emulations. We would rather prototype with FPGA for some of the
high risk blocks.
- [ An Anon Engineer ]
Palladium, ZeBu. It seems like Palladium has drastically cut down on
the set-up time you used to see with QuickTurn.
- [ An Anon Engineer ]
No
- George Gorman of LSI Logic
ProDesign and Axis. Those apply to different areas, though. Prodesign
(Gold & GoldPro) are used for building demonstrators to show things to
our customers, for ASIC prototyping, and for fast turnaround realtime
evaluation of algorithms as they are developed by the algorithm people.
Axis is used as accelerator in a simulation environment.
- [ An Anon Engineer ]
Zebu yes.. useful and good.
- Karthik Kandasamy of Wipro
We use Palladium. We have been using this since years, so we have
good setup (scripts) and LSF setup for bringup.
- [ An Anon Engineer ]
Yes, use an internally developed emulator.
- [ An Anon Engineer ]
No
- Frank Vorstenbosch of Telecom Modus Ltd.
No. Too expensive and complicated.
- Menno Lindwer of Philips Semiconductors
Way too expensive. For the money I get a huge farm of Opteron servers.
- Christian Mautner of Integrated Device Technologies
We use both Palladium and Axis.
- Olivier Haller of STMicroelectronics
Accelerators (IKOS) no longer since ~2 years.
Aptix *was* helpful for ASIC-prototyping, with growing tech problems.
Has now been successfully replaced by Prodesign Platinum. Best results
since. Setup time is reasonable, but you should PLAN the emulation of
your targeted ASIC. Real-world figures for realtime emulation:
Aptix: max 20-25 MHz,
ProDesign: upto 70 MHz.
1st setup: 2...6 weeks
2nd setup: under a week
10th+ setup: few hours, or mostly overnight jobs
set-up time: find a way how to automate and speed up iterations after
minor code changes (best way: get a consultant from the emu-company
for few weeks.)
- [ An Anon Engineer ]
We use ProDesign with Xilinx FPGAs. Single FPGA designs are fine.
Beyond that set-up time tends to explode.
- Suresh Rajgopal of STmicroelectronics
Yes Cadence Palladium and Mentor IKOS. Both have very painful setup
times.
- [ An Anon Engineer ]
There's an old Aptix box here that served another project well. We
currently have a single-FPGA eval board, driven by C code on a Windows
PC, accelerating some idea validation.
PC Vectors -> FIFO -> FPGA board -> FIFO -> PC
Love the idea of hardware in the loop, as long as the ROI is adequate.
- Jan Johnson of Rockwell Collins, Inc.
We have used Cadence Palladium. Set-up time can be extensive and
very design dependent. We have found that if the design is done
with emulation in mind then problems can be minimised to a great
extent. We would tend to allow 3 months for complete emulation
on a quick job.
- [ An Anon Engineer ]
We have some standard in-house FPGA boards or make up a new ones
to suit, which is for us quicker, ever so much cheaper, and it
meets our needs completely.
- Michiel Vandenbroek of China Core Technology Ltd.
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