( ESNUG 601 Item 4 ) ------------------------------------------------------- [10/02/26]
Subject: Prakash touts his new Microarchitecture Analysis for 95% less CDC noise
Subject: Prakash's new Microarchitecture Analysis infers SFCs (FIFOs, FSMs ...)
Subject: Cooley wowed that Real Intent is actually doing true "real intent" SW
The live DAC'26 Troublemakers Panel
Cooley: Prakash, last year I asked you about AI and you kind of went "I don't
care about AI. It's core algorithms where the win is."
But recently you suddenly took a total reversal, and now you just
announced a Riven signoff AI agent. So, are you doing, "if you can't
beat them, join them?"
Prakash: Why Not?
Cooley: Okay, thank you.
[laughter]
Prakash: But here's the problem speaking after Paul [Cunningham of Cadence] on
this panel -- is he just stole all my thunder.
Paul said that the AI technology from last year to this year -- there
has been advancement at an amazing pace.
Prakash: So, my whole perspective changed over the year. And yeah, why not?
We, at Real Intent, also see the benefit of AI -- and we have built
our new Real Intent Riven agentic flow which is for orchestration
and debug of all of our tools.
Prakash: And as has been said, our Riven will "play nice" with all the other
agentic flows.
So that's our goal.
Cooley: And it's going to do the MCP interface to Cadence and ...
Prakash: Sure we'll talk the same language that these guys will talk; and
right, we'll play nicely.
Prakash: So Riven AI is one pillar of our strategy. But Paul said something
else also. He said "that the fundamental technology advancements are
still needed to get to Level 5", for example.
And so this is what I had said last year -- that the algorithmic or
the fundamental technology advancements are our focus.
And from last year to now we have built this new technology which
we call Microarchitecture Analysis (MA).
Prakash: And this Microarchitecture Analysis is very unique because unlike
all the other EDA analysis tools -- which basically work at the
Boolean level of the design, we at Real Intent actually extract the
microarchitecture of the design -- by identifying & inferring
standard functional components (SFCs) from the RTL -- and then we run
analysis on top of that.
[ EDITOR'S NOTE: Prakash then chats up using his new Microarchitecture Analysis
technology in 3 different static sign-off domains -- his well established
Meridian CDC, his new Conquest MAI, and his renamed Conquest Sentry. - John ]
Starting with his Meridian CDC plus MA ...
Prakash: We announced our Meridian CDC with Microarchitecture Analysis (MA),
where we are dropping the engineering manual review burden by 95%. Which
is 20x better QoR that we at Real Intent can produce (vs SNPS/CDNS/MENT)
because we are employing microarchitectural analysis in there.
[ EDITOR'S NOTE: I found out the way this works is:
First, Meridian CDC uses MA to identify SFCs that structural analysis alone
doesn't see, for better context in analyzing and classifying CDC violations.
Second, Meridian CDC uses the additional functional intent context to
detect/identify CDC-safe crossings and reduce false positive violations.
For this handshake synchronizer, Meridian CDC used microarchitecture analysis
to recognize that the source and destination enables SrcEn and DstEn are
FSM-controlled outputs -- backed by a functional understanding of those FSMs.
(Traditional structural-only clock domain crossing analysis would flag the
handshake as "safe" or "unsafe" merely by checking if combinational
connectivity exists.)
Meridian CDC could prove that the data remains stable throughout the
handshake and that the enables are generated correctly according to
the functional protocol. This means no metastability can occur. This
eliminates the false-positive violations -- so it saves the engineers
the debug time needed for doing manual review, constraints, formal proofs,
and/or waivers. - John ]
And then his new Conquest MAI (as in Micro Architectural Integrity sign-off) with MA ...
Prakash: And we have a new product that we announced called "Conquest MAI"
which is for rules checking -- or rules-based review of the
microarchitecture. So, that's also a very unique capability.
[ EDITOR'S NOTE: I dug into this new Conquest MAI plus MA to learn more about it.
a. Conquest MAI uses Microarchitecture Analysis to identify & infer
the standard functional components (SFCs) in your design.
b. Once Conquest MAI finds the SFCs, it verifies microarchitectural
integrity and usage:
c. Conquest MAI then generates visualizations for easier debug:
- Schematics showing SFC implementation, including module hierarchy
- SFC functional block schematics with SFC interfaces and control
relationships
- FSM diagrams of states, transitions, resets, and state conditions,
e.g., self-loops, unreachable paths, illegal encodings... - John ]
And then finally, Prakash's renamed Conquest Sentry plus MA ...
(FYI -- Conquest Sentry is the new name for Sentry. "Why? I have no idea.")
Prakash: And we're also leveraging the same Microarchitecture Analysis technology
in our Real Intent Conquest Sentry security product to basically build
compliance with various CWEs (Common Weakness Enumeration).
So we have a two-pillar strategy.
Cooley: Right.
[ EDITOR'S NOTE: Two years ago, Conquest Sentry was my #2 Must-See for DAC 2024.
Above example of Conquest Sentry using Microarchitecture Analysis. - John ]
Prakash: We have adopted AI. I wanted to elaborate on the second pillar
that Paul talked about -- which is our fundamental innovation.
And that's where our new Real Intent Microarchitecture Analysis is
the breakthrough technology that we have created.
Cooley: Cool. Okay.
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COOLEY MISSED THIS: After editing this from the DAC'26 Troublemaker's Panel,
I realized that I had messed up -- because I had NOT understood the implications
while live on the panel.
5 days ago, after editing this, I did a follow-up text interrogation of Prakash
(just like I had done with Shiv Sikand of IC Manage in ESNUG 601 #3.)
Cooley: I need an exhaustive list of all the architectures that your
new Microarchitecture Analysis "sees" when it does it's thing.
Prakash: finite state machines, FIFOs, counters, shifters, decoders, RAMs,
register files, pulse synchonizers, pulse generators, comparitors,
adders, stacks, MUXes, clock trees, reset trees, multipliers,
accumulators, pipelines, LFSRs...
We're working on more (like ECC code) but this is a good sample of
what it "finds" for now.
The big thing is we "find" these microarchitectures even if they are
hidden across hierarchies.
Cooley: does it input on RTL code, netlists, behavioral code, what?
Prakash: RTL. Not netlists nor behavioral. Synthesizable RTL.
HOLY %$&@!, IT'S REAL! After that, I called Prakash directly. Long story
short, Prakash had explained that his Real Intent R&D folks had first started
working on MA when everyone was stuck at home 6 years ago during COVID.
And it is NOT yet another AI thing -- it's a fundamentally new EDA algorithm.
(That is, Real Intent's Microarchitecture Analysis is NOT something that
SNPS/CDNS/MENT can replicate with AI plus a $200,000,000 budget for AI tokens.)
Got that?
"With its new MA algorithm, Real Intent is actually living up to it's name
by figuring out the real intent of your design -- and this is something
that SNPS/CDNS/MENT can NOT replicate even with AI and $200 million!"
- John Cooley
DeepChip.com
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