( ESNUG 486 Item 5 ) -------------------------------------------- [10/08/10]

Subject: (DAC'10 #2) Jim Hogan ranks the variation-aware full custom tools

> FULL CUSTOM ADD-ON:  The company that ranked the second most user interest
> at DAC'10 was Solido, which sells a set of fancy schmancy variation tools 
> for custom design.  (Insert other custom buzzwords here.)  Oddly enough, 
> the Munich-based MunEDA, which has been in this niche for nearly 10 years 
> now, barely even got lip service from most users compared to Solido.


From: Jim Hogan <jim=user domain=tela-inc got calm>

Hi John,

I liked that the #2 tool in your recent DAC Report was Solido because they
also caught my eye some time ago.  That is, your analysis is in line with
my own analysis.  As an investor, I have constructed a meta map of custom
IC design commercial offerings for due diligence purposes.  I thought your
readers might be interested in it, too.

First, I categorize the main custom IC design tools as follows:

   - Front-end design. Schematic editors, Design environments, Waveform 
     Viewers.

   - Back-end design.  Layout editors, Design Rule Checkers (DRC), 
     Electrical Rule Checkers (ERC), Parasitic Extraction. 

   - Front/back interfaces.  Tools that tie front and back end such as 
     Layout vs. Schematic (LVS).
  
   - Simulation - SPICE simulators, FastSPICE simulators, RF simulators, 
     and mixed-signal simulators.  

   - Variation-aware design.  Variation-aware design tools include Process 
     Voltage Temperature (PVT) analysis and corner extraction, Monte Carlo 
     analysis and corner extraction, High-Sigma Monte Carlo analysis and 
     corner extraction, variation sensitivity analysis, and 
     Layout-Dependent Effects (LDEs).  

   - Modeling / Optimization.  Tools such as behavioral modeling and 
     optimizers.

   - Digital characterization.  Standard cell characterization, memory 
     characterization, and Statistical Static Timing (SSTA). 

VARIATION-AWARE CUSTOM IC DESIGN: CONTEXT  

Here are different types of variation analysis done for custom IC design.
I'm defining them beforehand so you'll see how I have ranked each tool
based on them:

   - PVT corner analysis.  In PVT analysis, the designer aims to get the 
     circuit to pass market specifications across a list of PVT corners.  A 
     PVT corner has a global process value (P) such as Fast Fast (FF), and 
     environmental values such as voltage (V), temperature (T), load, etc.  
     Designers have traditionally had a few PVT corners.  However, in 
     smaller geometries, there can be a model set variable for each device 
     type, plus the traditional V and T variables; this leads to an 
     exponential explosion of possible PVT corners.  The designer needs 
     fast, accurate ways to identify the PVT corners that matter.

   - Monte Carlo analysis.  At about 90 nm and below, PVT corners alone have
     become inadequate to deal with increased process variability.  So, in 
     Monte Carlo analysis, the local and global process variations are 
     modeled by the fabs as distributions, and the designer aims to improve 
     statistical quantities like parametric yield.  With Monte Carlo, >50 
     samples in a design loop gets too time consuming; the designer needs 
     fast ways to extract relevant statistical corners.  

   - High Sigma Analysis.  Required on a variety of circuits being 
     replicated many times like bit cells, sense amps, and digital standard 
     cells where one failure in a million (or a billion) matters.  Millions 
     of basic Monte Carlo simulations take too long; billions is not 
     feasible.  

   - Variation sensitivity analysis.  Helps identify weak spots in the 
     design, but can be costly in terms of simulation.  For example, a 
     1000-device design with 10 local process variables per device has 
     >10,000 process variables, leading to >10,000 simulations.
 
   - Layout-Dependent Effects (LDEs).  These well proximity effects, STI 
     stress, and parasitics further degrade circuit performance. 

VARIATION-AWARE CUSTOM IC DESIGN: VENDOR RANKING

Cadence, Synopsys and Mentor seem to be using a strategy of providing basic 
variation functionality and partnering with Solido and/or Muneda to provide 
more advanced variation capabilities.  In contrast, Magma is trying to do 
it all - they acquired Sabio Labs to fill out some of their capability in
conjunction with the introduction of their simulator FinSim.

And, finally, here's my ranking (and the reasoning behind each ranking)
of all known commercial "variation-aware" custom IC design tools:

#1. SOLIDO
 
Variation Designer.  "New kid on the block with a surprisingly complete 
offering."

   - PVT.  In addition to basic PVT corner analysis, Solido's "PVT+" tool 
     includes a "Design of Experiments" approach to extract the worst-case 
     from hundreds to thousands of possible corners.  Solido claims their 
     PVT analysis speed is 10-50x faster than just using SPICE simulations 
     to simulate all possible combinations. 

   - Monte Carlo.  Solido's "Monte Carlo+" tool runs Monte Carlo analysis, 
     and displays the results in tables, histograms / density curves, and 
     scatter plots.  It has task-specific stopping such as "stop when yield
     is verified."  Its "sigma-driven" corner extractor returns statistical
     corners at a pre-specified sigma (yield) level.  Offers Monte Carlo, 
     Latin Hypercube, and their own propriety 'Optimal Spread Sampling' 
     which they claim to be 2-10x faster than Monte Carlo or Latin 
     Hypercube.

   - High-Sigma.  Solido offers the "High-Sigma Monte Carlo" tool, claiming
     100-1000x speedup compared to typical Monte Carlo, in finding failure 
     cases and estimating yield. 

   - Layout-dependent effects (LDEs).  Solido's "Proximity+" tool is used 
     to estimate proximity effects prior to layout.  It automatically 
     guides layout designers as to which devices need guardbanding against 
     well proximity effects.  Additionally, Variation Designer links to 
     Cadence Virtuoso for estimating LDEs.

   - Sensitivity Analysis.  PVT+, Monte Carlo+, and Proximity+ each report 
     sensitivity of performances to variation parameters, without requiring 
     additional simulation. 

   - Interfaces.  Variation Designer can be used with Spectre, Hspice, and 
     Eldo SPICE simulators, plus Berkeley DA AFS, APS, UltraSim, HSim and 
     FineSim FastSPICE simulators.  It is integrated with Cadence Virtuoso 
     Analog Design Environment (ADE), Synopsys Custom Designer or a 
     netlist-only flow. 

   - Scalability.  Supports parallel processing.  Solido claims their tools 
     scale to designs with 100,000 devices.  Sensitivity analysis and 
     corner extraction run without needing to perturb all parameters. 

   - Accuracy.  SPICE-accurate because SPICE in the loop.  Monte Carlo+ has 
     confidence intervals for yield estimates (statistical quantities) and 
     sensitivities.

#2. CADENCE 

Virtuoso Analog Design Environment (ADE).  "Old school, the people's choice 
for decades."

   - PVT.  Cadence Virtuoso has a basic infrastructure that lets you set up 
     PVT corners, simulate them, and visualize the results in tables and 
     waveforms.  One of the early benefits of Cadence's offering was the 
     use of an extension language (SKILL) that enabled specific customer 
     tools and extensions.  

   - Monte Carlo.  You can also run Monte Carlo analysis, and visualize the 
     results in the form of histograms / density curves and scatter plots. 
     You can pick statistical corners off Monte Carlo analysis, for use 
     elsewhere.  Offers Monte Carlo and Latin Hypercube statistical 
     sampling.

   - High-Sigma.  Nothing.

   - Layout-dependent effects.  The schematic editor allows user-specified 
     parasitic values.  Also, support quick partial layouts (through layout 
     automation) to get quick estimates of parasitic effects and other 
     layout-dependent effects. 

   - Sensitivity analysis.  Virtuoso allows sensitivity analysis of process 
     and environmental variables. 

   - Interfaces.  Monte Carlo analysis only works with Spectre and APS;  
     the parasitic-aware features only work with Spectre, APS, and UltraSim.
     ADE is integrated with Solido, Muneda, Agilent, and PDF Solutions for 
     improved variation capabilities.  

   - Scalability.  Supports parallel processing.  Sensitivity analysis 
     requires perturbing all variables and simulating for each.

   - Accuracy.  SPICE-accurate because SPICE in the loop.

#3. MAGMA

Titan family, FineSim, FineSim family.  "Hot simulator, nascent variation 
analysis capability.  Magma could do quite well if they can deliver."

   - PVT.  Titan ASE (Analog Simulation Environment) has basic PVT corner 
     simulation.  Titan ADX (Analog Design Accelerator) extracts models of 
     design variables for performance across PVT corners, then supports 
     fast analysis and design on those models.

   - Monte Carlo.  ASE also has MC simulation, and visualizing the results 
     in tables, histograms, etc.  To my knowledge, ADX does not support 
     statistically-modeled effects.  Offers only Monte Carlo statistical 
     sampling.  

   - High-Sigma.  Magma's FineSim Pro simulator has a new "Fast Monte 
     Carlo" capability, where Magma claims a 100x+ speedup compared to 
     Monte Carlo analysis. 

   - Layout-dependent effects.  Titan AVP (Analog Virtual Prototyper) is a 
     fast layout prototyper, which they claim can be used for early 
     prediction of parasitic or proximity effects.  Titan ALX (Analog 
     Layout Accelerator) speeds layout design, to derive more accurate 
     layout effects.

   - Sensitivity analysis.  ADX has fast sensitivity analysis of PVT 
     parameters (but not statistical ones).  

   - Interfaces.  To the best my knowledge, the Titan tools only integrate 
     with Magma's own FineSim and FineSim Pro simulators.  

   - Scalability.  Supports parallel processing.  Not sure how well the ADX 
     models scale.  The sensitivity analysis in ASE requires perturbing all 
     variables and simulating for each.

   - Accuracy.  ASE is SPICE-accurate because SPICE in the loop.  But ADX 
     is only as good as its underlying models.

#4. MUNEDA

WiCkeD family.  "More an optimizer than a variation-aware design tool."

   - PVT.  Muneda's WCO (Worst Case Operation) tool has partial PVT 
     functionality:  it finds worst-case conditions across voltage and 
     temperature.  

   - Monte Carlo.  Muneda's MCA (Monte Carlo Analysis) and MMA (Mismatch 
     Analysis) tools offer basic Monte Carlo simulations, and visualizing 
     the results in tables, histograms, and scatter plots.  The WCA (Worst 
     Case Analysis) tool extracts design-specific statistical corners, and 
     specifies the sigma level for each corner.  Offers only Monte Carlo 
     statistical sampling.  

   - High-Sigma.  Nothing.

   - Layout-dependent effects.  The Cadence Virtuoso link allows for 
     "quick" layouts and estimating LDEs, after layout (no pre-layout 
     estimation).

   - Sensitivity Analysis.  MCA / MMA offer sensitivities to process 
     variables.  The Response Surface Modeling (RSM) tool extracts response 
     models, which can be used for detailed sensitivity analysis.  Process 
     (but not environmental) sensitivities with Monte Carlo without extra 
     simulation runs.

   - Interfaces.  Through the Simulator-Framework-Interface (SFI), WiCkeD 
     works with simulators from Cadence, Mentor, Synopsys, and Berkeley DA;  
     and with environments from Cadence, Mentor, and Synopsys.  It also has 
     a Scripting Interface (SCR).

   - Scalability.  The sensitivity analysis in MCA/MMA requires perturbing 
     all variables and simulating for each.

   - Accuracy.  WiCkeD is SPICE-accurate because SPICE in the loop;  
     however, some of the underlying algorithms assume linear responses. 
     Confidence intervals in Monte Carlo yield estimates.

#5. SYNOPSYS

Galaxy Custom Designer (CD).  "They may have a gold standard simulator,
but they're new to full custom design."

   - PVT.  In the last year, Synopsys has built PVT corner setup, 
     simulation, and visualization into CD.

   - Monte Carlo.  Synopsys also added basic Monte Carlo analysis and 
     visualization.  You can pick corners off Monte Carlo analysis, for use 
     elsewhere.  Offers only Monte Carlo and Latin Hypercube statistical 
     sampling.  

   - High-Sigma.  Nothing.

   - Layout-dependent effects.  Custom Designer has a fully-integrated 
     layout editor (LE) and schematic-driven layout (LE), to get to layout 
     smoothly.  CD has automated device generation and placement, but not a 
     full "quick" solution for fast estimation of layout effects.

   - Sensitivity Analysis.  CD allows sensitivity analysis of process and 
     environmental though it takes extra simulation effort beyond PVT or 
     Monte Carlo analysis. 

   - Interfaces.  As far as I know, Synopsys CD is only integrated with 
     their HSPICE simulator and Waveview.  Synopsys is also integrated with 
     Solido and Muneda for advanced variation capabilities.  

   - Scalability.  Supports parallel processing.  Sensitivity analysis 
     requires perturbing all variables and simulating for each.

   - Accuracy.  SPICE-accurate because SPICE in the loop.

#6. MENTOR

IC Analyst, IC Station.  "Really old school."

   - PVT.  IC Analyst has basic capabilities for PVT corner setup, 
     simulation, and visualization.

   - Monte Carlo.  Monte Carlo analysis and visualization.  Visualizations 
     include performance tables (per corner), histograms, and scatter plots.
     The "Smart Monte Carlo" feature enables stopping once a statistical 
     measure is sufficiently accurate.  Offers just Monte Carlo statistical 
     sampling.

   - High-Sigma.  Nothing.

   - Layout-dependent effects.  IC Station Schematic, IC Station Layout, 
     and IC Station SDL provide a smooth flow between front and back end 
     design, and there is a degree of layout automation.  

   - Sensitivity Analysis.  Allows sensitivity analysis of process and 
     environmental though it costs extra simulation effort beyond PVT or 
     Monte Carlo analysis. 

   - Interfaces.  IC Analyst only integrates with Mentor simulators.

   - Scalability.  Supports parallel processing.  Sensitivity analysis 
     requires perturbing all variables and simulating for each.

   - Accuracy.  SPICE-accurate because SPICE in the loop.

#7. THE OTHERS 

I am mentioning these companies for the sake of completeness; they are not
active players in this market.

   - PDF Solutions Circuit Surfer.  "Service-ware, not actively marketing a 
     product."  Used to market a variation product called Circuit Surfer, 
     which did basic Monte Carlo analysis and visualization.  PDF Solutions 
     even OEM'd the tool through Cadence around 1999/2000.  PDF seems to 
     have stopped marketing a separate product and is focused on offering 
     general yield improvement services.

   - Agilent EESof ADS.  "Microwave and RF focused."  Some PVT and Monte 
     Carlo analysis and visualization capabilities, but niche player 
     focused on Microwave and RF.

   - Infiniscale TechModeler, TechAnalyzer, TechYielder.  "Euro-Centric, 
     not much data outside of their website."  Offer model-based Monte 
     Carlo analysis with visualization.

I hope this analysis helps your readers, John, as they navigate through the
variation-aware custom IC design space.  Also, the market moves fast, so if
I missed anything from any of the vendors in my snapshot, I encourage them
to chime in to supplement my summary. 

    - Jim Hogan
      Tela Innovations                           Los Gatos, CA
Join    Index    Next->Item










   
 Sign up for the DeepChip newsletter.
Email
 Read what EDA tool users really think.


Feedback About Wiretaps ESNUGs SIGN UP! Downloads Trip Reports Advertise

"Relax. This is a discussion. Anything said here is just one engineer's opinion. Email in your dissenting letter and it'll be published, too."
This Web Site Is Modified Every 2-3 Days
Copyright 1991-2024 John Cooley.  All Rights Reserved.
| Contact John Cooley | Webmaster | Legal | Feedback Form |

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)