( ESNUG 427 Item 6 ) -------------------------------------------- [04/14/04]
From: Mark Lancaster <mark.lancaster=user domain=motorola spot calm>
Subject: How To Specifically Limit DC Synthesis Cell Types And Numbers?
Hi, John,
Is there a way to tell DC to synthesize your RTL using a limited number
and type of cells? For example, if you have a chip already in layout
and a portion of the RTL needs to be reworked, is there a way to tell
DC to synthesize the new RTL using only the cells that are already
laid out so that the change would only affect the metal layers?
I realize that DC may not be able to implement the new logic functions
given the limited number/type of available cells and even if DC can
implement the logic, you may not be able to route it with a fixed cell
placement, but is there a way to get it to try? Obviously, I can
set_dont_use the cells in my library that don't appear in the area to
be changed, but how can I limit the quantity of each cell type that DC
is allowed to use? Thanks for any ideas.
- Mark Lancaster
Motorola SPS
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