( ESNUG 414 Item 9 ) -------------------------------------------- [06/18/03]
From: David Blunden <david_blunden=user company=eur.3com spot calm>
Subject: Engineer Seeks An Unbiased System Verilog vs. SystemC Comparison
John,
I have come across your name again (EE Times - VHDL, the new Latin) and
wondered if you would have the time to help me or push me in the right
direction. My job is CAE support and I am trying to get a non-biased
comparison of System Verilog versus SystemC.
My impression is that they do the same sort of things, but SystemC is here
now, whereas System Verilog wont be ready for another couple of years.
If you can help I would be very grateful.
- David Blunden
3Com
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