( ESNUG 405 Item 10 ) -------------------------------------------- [01/29/03]
From: Richard Conlin <convict=rich.conlin jail=paradigm-works squat psalm>
Subject: I'm Having Trouble Using Mentor Fastscan Along With DC-Expert-Plus
Hi John,
My current client uses DC-Expert-Plus for scan insertion at the block level
and Mentor Fastscan for top level ATPG vector generation. Our main issue
right now is how to verify that block level scan insertion went well BEFORE
actually assembling the entire chip and running through Fastscan. We've
tried using the
create_test_patterns -dft
command to generate patterns, but the resulting coverage numbers don't
correlate well with Fastscan due to differences in the libraries which the
two tools use. Since Fastscan is our "golden" ATPG tool, we'd ideally like
to use it to do our checking.
Our Mentor AE has informed me that Mentor provides a utility which will
convert a DCxP generated STIL file into Fastscan dofiles and testprocs. My
first question is whether or not anybody out there has experience either
directly with this flow, or with a similar one involving using DCxP in
conjunction with Fastscan, or other "foreign" ATPG tool? My second question
is how do people feel about DCxP's STIL file generation capabilities? Any
"tricks" one should know about before basing a design flow on it?
- Rich Conlin
Paradigm Works, Inc. Andover, MA
|
|
