( ESNUG 388 Item 19 ) -------------------------------------------- [02/27/02]
Subject: ( ESNUG 387 #5 ) Using Synopsys DesignWare vs. Rolling Your Own IP
> DesignWare does do trade-offs of different adder architectures for you, as
> does the Ambitware stuff in the Cadence synthesis tool. If you really
> must use DC, you can improve its default results (if you have the
> appropriate licence) by adding the following:
>
> set synthetic_library "dw_foundation.sldb"
> set dw_prefer_mc_inside true
>
> Why isn't this the default, then? Because you need to have an extra DC
> licence to use it. Don't recall which one, sorry. There is a similar
> "datapath" option when running Ambit which I think is specified on the
> ac_shell command line.
>
> - Andrew MacCormack
> Cadence/Tality Livingston, Scotland
From: Oliver Meisel <oliver@synopsys.com>
Hi John,
A couple of things regarding DesignWare usage and the type of tradeoffs it
makes.
First a minor correction to Chris' message.
The license required to enable the more advanced architectures is now called
simply "DesignWare". (This is the same license required to use the more
complex IP blocks and the verification models in DesignWare such as PCI-X.)
With this license, and by setting the synthetic_library variable to
"dw_foundation.sldb", DC will be able to leverage more arithmetic and
datapath components with more complex architectures and therefore will
make better tradeoffs.
The Standard DW Library only contains ripple carry and carry look ahead
(CLA) architectures for adders and carry save arrays for multipliers.
DesignWare offers a variety of high performance structures such as Wallace
tree multipliers and Brent-Kung, fast CLA, carry-save, and carry-select
architectures for adders.
Chris also mentioned the dw_prefer_mc_inside variable (he is right, no
Module Compiler license needed.) When this variable is set to "true",
the datapath elements are dynamically generated using Module Compiler
technology.
In addition, if a DC-Ultra license is available, two more advanced
commands can be used - transform_csa and partition_dp. The partition_dp
command transforms arithmetic operators (+,-,*) into datapath blocks
which will be implemented with the Module Compiler based datapath
generator mentioned above. The transform_csa command transforms those
arithmetic operators into carry save architectures (CSA).
Here's a simple datapath example and different timing/area results with
different flows.
module mux4 (m0,m1,x,b0,b1,z);
parameter n=32;
input [n-1:0] m0,m1,x;
input [2*n-1:0] b0,b1;
output [n:0] z ;
wire [2*n:0] y1;
wire [2*n:0] y0;
wire [2*n:0] y2;
assign y0 = m0*x + b0;
assign y1 = m1*x + b1;
assign y2 = (y1>y0) ? y1 : y0;
assign z = y2[2*n:n] + y1[(n-1):0];
endmodule
All of these have been achieved using TSMC's 0.13 um technology and the
2001.08-SP2 release of DC.
Flow Path Length Path Slack Design Area Compile Time
-------------------- ----------- ---------- ----------- ------------
DC-Expert + DW_Standard 13.74 -7.24 240760.28 2745.29
DC-Expert + DW 7.33 -0.83 213677.06 3161.75
DC-Ultra + DW + MCI + TCSA 6.63 -0.13 210615.31 2754.35
DC-Ultra + DW + MCI + PD 6.50 0.00 174409.92 952.84
DW_Standard is the standard library shipped with DC. DW is the full
DesignWare library. "DW + MCI + TCSA" means DesignWare, with
dw_prefer_mc_inside set to true and transform_csa command. "DW + MCI
+ PD" means DesignWare, with dw_prefer_mc_inside set to true and
partition_dp command
- Oliver Meisel
Synopsys, Inc. Mountain View, CA
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