( ESNUG 386 Item 1 ) --------------------------------------------- [01/16/02]

From: "Mike Montana" <montana@synopsys.com>
Subject: Buffer/Inverter PhysOpt 2001.08 & 2001.08-SP1 Bug Creates Bad Logic

Hello John,

One of the ACs in San Diego told me about a situation where PhysOpt can put
"extra inversions" in your netlist and create bad logic.  This problem can
occur if your library has certain cell that can act as *both* a buffer and
an inverter.  Below is an example of this type of cell followed by an
example of a simple buffer cell.

                       _________________
                      |    CELL A       |
                      |       +---------| out_bar (pin 1)
                      |  |\   |   |\    |
                   in |--| >o-+---| >o--| out (pin 2)
                      |  |/       |/    |
                      |_________________|


                       _________________
                      |     CELL B      |
                      |  |\       |\    |
                   in |--| >o-----| >o--| out (pin 1)
                      |  |/       |/    |
                      |_________________|


PhysOpt can swap between single output cells and the multi-output cells to
attempt buffering and/or sizing.  If the two sets of cells have the pins
declared in a different order, then PhysOpt can get confused as to the
proper output pin connections.  Consider the example above.  CELL A pin 1 is
the inverted output while CELL B pin 1 is the non-inverted output.  During
buffering and/or sizing, the swap between the two cells is done such that
net connected to pin 1 of CELL A is reconnected to pin 1 of CELL B.  This
is incorrect and results in extra inversions and bad logic.

Please note the following regarding this bug:

  1) It only exists in versions 2001.08 and 2001.08-SP1

  2) It only occurs in Physical Compiler, not Design Compiler

  3) It only occurs for those libs that have the cell pins declared in a
     *different* order, (i.e. pin 1 is the non-inverting output on simple
     buffers/inverters but is the inverting output on the multi-output
     buffers/inverters.  This problem will NOT occur if the pins are
     defined in the same order on these cells.

There are two temporary workarounds to this problem.

  1) use version 2000.11-SP1

  2) use version 2001.08 and place a dont_use attribute on all of the
     multi-output library cells which can act as both a buffer and an
     inverter before running physopt.  It is OK if the pre-physopt
     netlist contains some of these cells.

     For example:

          set_dont_use vendor_lib/inv_buf*
          physopt

This bug will be fixed in a patch release scheduled for EST availability the
first part of February 2002.  This bug was documented in Solv-It article
Physical_Synthesis-325 but I also wanted to alert your readers to it, too.

    - Mike Montana
      Synopsys, Inc.                             Dallas, TX


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