( ESNUG 378 Item 1 ) -------------------------------------------- [10/03/01]
From: "Gregg Lahti" <gregg.lahti@corrent.com>
Subject: You Might Want To Wait For DC 2001.08-SP1 Release Before Upgrading
Hi, John,
I want to do a rant about the new 2001.08 ver of DC. We've switched over
to it and had nothing but problems. Tcl scripts which ran flawlessly on
2000.11-SP2 break for variables that should be set that aren't (such as
"synopsys_program_name"), DesignWare license issues during initial linking
and flattening after compiles, Presto issues, and illegal Verilog being
written out. Ugh. I hate debugging new versions, and I think we'll wait
to switch over when 2001.08-SP1 gets released in the very near future.
Some of these issues are known by Synopsys and filed as STARs. Some aren't.
Unfortunately, Synopsys doesn't list all user filed STARs on SolvNet. It
seems the only way to find out about any of these known issues is to post
the bug and get a response back from SNPS support telling you that it's a
known issue, or have inside info from your local AE listing all of them.
Wouldn't it be great to see a list of user filed STARs for each tool & rev
on SolvNet, updated on a real-time basis? The data would be most helpful
to the customers, especially since one could do a quick reference check and
verify that it's a bug and there's a workaround rather than spend hours
determining the root cause/work-around and wasting the Support line's time
in a submission.
Here are the details of some of the DC 2001.08 issues I've found so far:
1) Presto is enabled by default. Reading in Verilog may fail if you don't
have a Module Compiler license when Presto starts reading in certain
structures. We weren't relying on Presto to get the newer indexed-
array features, but I did find that using Presto gave better error
messages when I had problems reading in Verilog. A quick edit to
our setup file with "set hdlin_enable_presto false;" made this issue
go away.
2) We're using the TOPS Tcl environment for synthesis which a few of us
presented at Boston SNUG 2000. Within the Tcl code procedures there
is an "if" construct that looks like this:
if {[set synopsys_program_name] != "pt_shell"} {
...
}
On various synthesis runs, I'd see an error from DC 2001.08 that the
"synopsys_program_name" variable doesn't exist even though it was
defined as "global" at the beginning of the procedure. Granted,
this code is not the most efficient way to do a comparison but it
worked fine in 2000.11. The workaround to fix it was:
if {$synopsys_program_name != "pt_shell"} {
...
}
Once we did that, the problem went away. Weird.
3) We've had some issues with reading in Verilog netlists, re-grouping,
and writing out a new Verilog netlist, where the resultant Verilog
netlist didn't get the input/output assignments listed in the
sub-module. Effectively, the resultant Verilog netlist was illegal
and DC 2001.08 couldn't read in what it wrote out. Our workaround
for now was to use the DB file for everything and then write out the
verilog at the last step.
My local AE has said that a 2001.08-SP1 release is due soon. I think I'll
wait until that comes out before I'll switch over.
- Gregg Lahti
Corrent Corp. Tempe, AZ
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