( ESNUG 345 Item 11 ) --------------------------------------------- [3/1/00]
Subject: ( ESNUG 344 #9 ) Some DC Rumors & Running TCL In Design Analyzer
> Oh Great! We get our entire synthesis environment setup for TCL-based
> scripting (DC, PT, etc) and find out that Design Analyzer doesn't support
> TCL. This really blows chunks, considering there is no elegant way to
> automagically determine if you would like TCL or DC-flavored usage in your
> ~/.synopsys_dc.setup file. Hence any DA usage must now have a separate
> kludge to get the library paths, environment setups, etc to work! Yuck!
>
> Rumours say that Synposys is re-writing the GUI interface of Design
> Analyzer to be TCL-friendly, but that isn't available now when I need it.
> Now why can't Synopsys release tools (DA & DC) that at least work together
> in a nice fashion?
>
> - Gregg Lahti
> Intel Corp Chandler, AZ
From: [ A New Jersey Synopsys CAE ]
Good morning John! I'm an AC in the New Jersey office, just figured I'd
drop you a line with a few helpful bits of info.
1. Gregg only needs one setup file (thankfully)! I thought the same thing
as he when I found out that DA was DCSH-only. However, you can write a
.synopsys_dc.setup in a format called "Tcl-S", or "Tcl Subset" which is
basically a Tcl setup file which allows a certain subset of commands.
The trick to this is that the first line has to begin with a '#'
character. This setup file WILL be understood by DC, DC-Tcl, and DA!
Cool, eh? Here's my setup file:
# Tcl-s
target_library = {lsi_10k.db}
synthetic_library = { dw_foundation.sldb }
link_library = "* $target_library $synthetic_library"
bc_fsm_coding_style = "two_hot"
# automatically source any Tcl procedures available for use
suppress_message CMD-041
foreach _script [glob ~/tcl/*.tcl] {source $_script}
foreach _script [glob ~/tcl/dc/*.tcl] {source $_script}
unsuppress_message CMD-041
unset _script
Have no fear, you can definitely intermix shell types without fear of
complex setup file tricks! Without this, we ACs (who must jump between
shells a lot) would be in pretty bad shape too.
2. Design Vision is indeed in beta, and it is available to customers. It
will support both DCSH *and* Tcl. Customers are encouraged to sign up
for the beta. Simply go to our homepage at http://www.synopsys.com/,
and click on "Synopsys' 2000.05 Synthesis Beta Program" in the Product
News column. The Design Vision section is towards the bottom.
Personally I myself am a huge Tcl advocate, and I'm glad to see customers
moving to it.
- [ A New Jersey Synopsys CAE ]
---- ---- ---- ---- ---- ---- ----
From: [ A Synopsys Marketingdroid ]
Hi, John,
The rumors Gregg heard are true. We are implementing a new GUI for Design
Compiler that supports both dc_shell and DC-Tcl. The new GUI supports
advanced analysis capabilities in addition to existing Design Analyzer
features. The new capabilities in the tool are:
1. Hierarchy Browser - a tree control capability that enables easy
design navigation.
2. Timing Histograms - a high-level view into a design's timing issues
End Point Histogram - an overall picture of timing
Path Slack Histogram - all paths through a pin, port, net
Net Capacitance Histogram - an overall picture of net capacitance
3. Path Schematic - A simple schematic view of one or more timing paths,
paths that span multiple hierarchical levels, and fanin/out can be
easily added to nodes in the path
Knowing how you feel about us, John, you'll probably edit out anything more
that I say which promotes this tool anyway. So I'll stop now. :)
- [ A Synopsys Marketingdroid ]
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