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  Framingham, MA - Dafca seeks a senior apps engineer to support their ClearBlue post-silicon
  debug products.  Candidate must have 7+ years of ASIC/FPGA design experience and at least
  2 years experience in a technical customer facing position.  The candidate must possess a
  strong knowledge of all aspects the ASIC design process.  Hands-on experience in Verilog
  and VHDL circuit design and Design Compiler, as well as Tcl / Perl scripting is required.

  Experience in at least two of the following: verification, Synopsys DFT Compiler/TetraMAX
  or Mentor DFT Advisor/FastScan, clock tree synthesis, PrimeTime, Cadence/Synopsys/Magma P&R,
  and cross talk and power analysis is strongly desired.  Person must be experienced in VCS,
  Modelsim, and NC-Sim).  Expertise in FlexLM licensing, Linux admin and Bugzilla a plus.

  This position requires a BSEE or MSEE.

  Interested candidates should contact Heinz at heinz3@dafca.com.  No recruiters please.

  Posted: 06/20/2006

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