ESNUG Jobs Section

  Mountain View, CA - Jasper DA seeks a CAE with at least 2 years of logic design or verification
  experience of ASICs/FPGAs required.  Working knowledge of Verilog/VHDL required.  Formal tool
  experience highly desired.  BSEE w/ excellent communication and inter-personal skills a must.

  Interested parties please contact Yann at yann06@jasper-da.com.  No headhunters please.

  Posted: 02/09/2006

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