( SNUG 99 Item 30 ) ----------------------------------------------- [3/31/99]

 WHERE THERE'S SMOKE, THERE'S FIRE:  With Deeeeeeep Sub Micron now coming
 in vogue, all those transistor-level EPIC tools appear to be the Synopsys
 equivalent of discovering the Lost Continent of EDA Atlantis.  And even
 though at SNUG'99, the EPIC user talks only drew 34 users, the Customer
 Education Workshop Calendar at www.synopsys.com has 98 classes scheduled
 in EPIC tools!!  (What?!  Comparitively, they had 89 general synthesis,
 33 advanced synthesis, 17 VHDL, and 30 Verilog classes scheduled in the
 same months.)  A hefty 98 classes indicates a *LOT* of hidden EPIC
 customers.  It's said that you can't see the true size of an iceberg
 because 90 percent of it is underwater.  Hmmm...  

 The 'Other' Numbers
 -------------------

 For a nosely bastard like myself, class schedules can tell a *lot* about
 what tools are hot and what are not.  Here's a summary of what I found:

          Class                              Number Scheduled
          ------------------------           ----------------
          General Synthesis                         89
          Advanced Synthesis                        33
          Verilog for Synthesis                     13
          VHDL for Synthesis                        14
          Basic Verilog/VCS                         20
          Adv. Verilog/VCS                          10
          Basic VHDL/VSS                            14
          Adv. VHDL/VSS                              3
          Hardware Modeling                          8
          Behavioral Synthesis                       6
          Module Compiler                           18
          Test Synth / TestGen                      26
          PrimeTime                                 46
          VERA                                       5
          PCI Bus Protocol                           3
          Library Compiler                           2
          FPGA Synthesis (Verilog)                   3
          FPGA Synthesis (VHDL)                      3
          ECO Compiler                               0
          Formality                                  1
          EPIC Tools                                98

 I've already commented on the EPIC surprise.  Everything seemed to make
 sense (twice as many Verilog classes than VHDL, a high number of PrimeTime
 classes, Module Compiler beating Behavioral Compiler by 3-to-1, only two
 Library Compiler classes, 5 VERA classes, etc.)  Only one other surprise...