( SNUG 01 Item 4 ) --------------------------------------------- [ 3/28/01 ]

Subject: What SNUG'01 Attendees Liked & Disliked

VOTING WITH THEIR FEET:  One way to tell what's hot and what's not is to
just see how many people attended what talk.  Here's what I personally
counted in each room during the SNUG'01 conference.

  Monday, March 5                                     Number Of Attendees

    9:00 - 12:15  (MA1) Tutorial on Design Compiler & Presto   231
    9:00 - 12:15  (MA2) Tutorial of SystemC                     66
    9:00 - 12:15  (MA3) Tutorial on Power Compiler              68
    9:00 - 12:15  (MA4) Tutorial on Module Compiler             28

    1:30 - 3:30   (MB1) Users on Vera, Vera & PhysOpt          214
    1:30 - 3:30   (MB2) Power Compiler, Module Compiler, FPGA   76

    3:45 - 5:45   (MC1) DC, simple_compile_mode, ACS        296 + 9 standees
    3:45 - 5:45   (MC2) Emacs Verilog & Verilog Standards       38
    3:45 - 5:45   (MC3) Compute Farms, LSF, Design Data Mgmt    31

    5:45 - 8:30   Non-Synopsys EDA Vendor Fair Party         Est. 600


  Tuesday, March 6

    9:00 - 10:15  Keynote Address (Aart's Speech)          287 + 22 standees

   10:30 - 12:30  (TA1) DC, FoorPlan Mgr, PrimeTime, ATPG      257
   10:30 - 12:30  (TA2) Code Coverage, Verification, BFMs       84
   10:30 - 12:30  (TA3) Power Compiler, FPM, PathMill, Libs     23

    1:45 -  3:45  (TB1) Physical Compiler (PhysOpt)        247 + 24 standees
    1:45 -  3:45  (TB2) PowerMill, OLA, Antenna Effects         37

    4:00 -  4:30  Nvidia Real Life Design Project Talk         251

    6:00 -  8:00  Synopsys R&D Cocktail Party                 ~500


  Wednesday, March 7

    9:00 - 12:15  (WA1) Tutorial PhysOpt/Chip_Arch/FlexRoute   208
    9:00 - 12:15  (WA2) Tutorial Presto HDL Compiler            74
    9:00 - 12:15  (WA3) Tutorial FPGA Compiler & Big FPGAs      22

    1:30 -  4:45  (WB1) Tutorial on PrimeTime                  108
    1:00 -  4:45  (WB2) Tutorial on TetraMax, DFT Compiler      82
    1:00 -  4:45  (WB3) Tutorial on VCS, Vera, Covermeter       51
    1:00 -  4:45  (WB4) Tutorial on Arcadia                     24


By looking at which sessions where attendees had a choice, you can see the
designers have a strong interest in: PhysOpt, Chip Architect, DC, Presto,
PrimeTime, FlexRoute, simple_compile_mode, ACS, and Vera.  Conversely,
they had minimal interested in: Power Compiler, FPGA Compiler, Arcadia,
and Module Compiler.  The "standees" data indicated a surprise interest
(i.e. topics were worth standing for) in: ACS, simple_compile_mode, and
PhysOpt.

Overall user attendance for SNUG'01 was 485 customers.  Compared to last
year's 474 customers, you could say that SNUG had a steady following.


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