( DAC 00 Item 10 ) --------------------------------------------- [ 7/13/00 ]
Subject: Cheaper HDL Simulators from Fintronic, Aldec, ZOIX, FTL Systems
DEMANDING EQUAL TIME & CONSIDERATION: In the survey I sent out asked about
Synopsys VCS, Cadence NC-Verilog, and ModelTech by name. I forgot some of
the others and one CEO is hopping made at me:
"Unfair! I noted with surprise that you are asking for feedback on
comparing VCS versus NC-Verilog and even about ModelTech's Verilog
simulator when the best Verilog simulator available is Fintronic's
Super FinSim, which you did not mention.
My surprised is caused by (1) the fact that you know Fintronic since
you visited our company in 1994 and (2) the fact that you were on a
panel at DAC in 1996, which discussed Viewlogic's removal of VCS from
an independent benchmark conducted by John Hilawi in London, because
VCS was MUCH slower than Super FinSim.
Since 1996, Fintronic continued to lead the technological progress in
Verilog simulation, and Super FinSim became even better with respect
to its competition:
- Fintronic was the first to introduce 64-bit Verilog simulation
with first sales in the summer of 1996 and simulating 16 million
gates in 1998.
- Fintronic argued and implemented mixed cycle and event driven
simulation at a time (1995) when Cadence and Synopsis were arguing
in favor of pure cycle simulation, only to adopt Fintronic's
position in 1998.
- Fintronic was praised in writing in 1998 by a member of Cadence
Berkeley Labs for presenting in 1997 at the NATO Summer school in
Il Ciocco, Italy, a much better solution for embedded processor
simulation than that developed at Cadence Berkeley Labs. Indeed,
Fintronic and its partner VaST systems announced soon after (before
IVC 1998) the ability to simulate 100 million intructions per
second three days before Cadence announced 5,000 instructions per
second.
- Fintronic was a pioneer in incorporating formal methods as part of
event-driven simulation: dead code elimination, source code
transformation, etc.
Super FinSim, which for a while (perhaps even today) was more compatible
with Verilog XL than NC-Verilog, is used by companies who care about
performance and the quality of their Verilog simulation and who depend
on the success of their products.
Fintronic continued to lead the Verilog simulation field at DAC 2000,
where it introduced a product available today, called FinFarm. FinFarm,
which was announced at DAC 1999, is a simulation farm that allows one
engineer to manage hundreds of simultaneous Verilog simulations, by
providing tools for (1) launching, (2) monitoring, (3) collecting
results, (4) processing results, and (5) notifying the appropriate party
about the results.
It is not by accident that Transmeta Corporation, which announced in
January 2000, its Crusoe chip set, is using numerous licenses of
Super FinSim."
- Alec Stanculescu, President of Fintronic USA
"What would a company named ZOIX make? Remarkably, I was the only one
stopping by the booth who assumed they had a simulator to sell. They
sell a compiled code Verilog simulator (like NC-Verilog) that can
simulate different blocks on different processors. They say that
splitting up a simulation based on modules is just as good as running a
sophisticated min cut set algorithm on it to determine how to partition
it. Their tool is still in beta.
Fintronic sells a cheap Verilog simulator that they claim is faster than
Cadence NC-Verilog. It runs on PCs or 64 bit Solaris.
Aldec sells a super cheap single kernel VHDL/Verilog/EDIF simulator that
runs on NT or Linux. They say a hardware/software co-verification tool
is coming.
FLT Systems also sells a cheap VHDL/Verilog simulator.
Arexsys sells a backplane that allows many simulators to work together."
- an anon engineer
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