( ESNUG 398 Item 12 ) -------------------------------------------- [07/31/02]

From: Christen Jocson <cmcc@synopsys.com>
Subject: User Confusion On Units For Library Derived PhysOpt R and C Values

Hi John,

I was engaged with a customer that was having problems with extremely high
Design Rule Cost at the start of a PhysOpt run.  One of the investigations
we pursued was the possibility that his R and C numbers were incorrect.  At
the beginning of a PhysOpt run, GR-10 information messages get reported,
stating the library derived horizontal & vertical capacitance & resistance.
These numbers don't have units on them, which can lead to much confusion
when trying to determine if the values are correct or not.

The units for the Library Derived Horizontal and Vertical Capacitance are
taken from the target/logical library.  The units for the Library Derived
Horizontal and Vertical Resistance are derived from the time unit and the
capacitive load unit in the target/logical library.  Mistakenly, several
users have thought that the pulling resistance unit in the target/logical
library is the unit for the Library Derived Resistance values.  If the
pulling resistance unit is used on the Library Derived Resistance values
it typically makes them appear to be off by 1x10^3, which can be quite
alarming.

Here's a quick example of how to apply the units from the target/logical
library.  Target/Logical Libary contains:

             time_unit : "1ns" ;
             pulling_resistance_unit : "1kohm" ;
             capacitive_load_unit ( 1, pf ) ;

The Library Derived Capacitance unit is picofarads (pF).  The Library
Derived Resistance unit is [1x10^-9/1x10^-15 = 1x10^6] megaohms (MOhm).

For the "average" design, you would expect Resistance values around
Nx10^-6 to Nx10^-7.  Then when applying the MOhm unit, the Resistance
would be on the order of N to 0.N Ohms.  These estimates are strictly
design dependent and may vary greatly.

    - Christin Jocson
      Synopsys, Inc.                             Dallas, TX


============================================================================
 Trying to figure out a Synopsys bug?  Want to hear how 14,063 other users
  dealt with it?  Then join the E-Mail Synopsys Users Group (ESNUG)!
 
     !!!     "It's not a BUG,               jcooley@TheWorld.com
    /o o\  /  it's a FEATURE!"                 (508) 429-4357
   (  >  )
    \ - /     - John Cooley, EDA & ASIC Design Consultant in Synopsys,
    _] [_         Verilog, VHDL and numerous Design Methodologies.

    Holliston Poor Farm, P.O. Box 6222, Holliston, MA  01746-6222
  Legal Disclaimer: "As always, anything said here is only opinion."
 The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com

 Sign up for the DeepChip newsletter.
Email
 Read what EDA tool users really think.


Feedback About Wiretaps ESNUGs SIGN UP! Downloads Trip Reports Advertise

"Relax. This is a discussion. Anything said here is just one engineer's opinion. Email in your dissenting letter and it'll be published, too."
This Web Site Is Modified Every 2-3 Days
Copyright 1991-2024 John Cooley.  All Rights Reserved.
| Contact John Cooley | Webmaster | Legal | Feedback Form |

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)