( ESNUG 361 Item 5 ) --------------------------------------------- [11/16/00]
Subject: ( ESNUG 360 #1 ) PhysOpt/Saturn/PKS For Wimps; Real Men Use P&R!
> Many of us Wall Street watchers read ESNUG because we're monitoring the
> adoption of physical synthesis tools. From the many customer tape-out
> stories we've read in ESNUG, it appears to those of us in the financial
> community that Physical Compiler is catching on with designers. With
> Cadence's SE-PKS now released, are designers seeing (or do they
> anticipate) any advantage to using SE-PKS with Physical Compiler as
> compared to using Physical Compiler and SE *without* PKS features? Are
> Physical Compiler users interested in SE having PKS features?
>
> - Garo Toomajanian, Research Analyst
> Dain Rauscher Wessels Boston, MA
From: [ 48% Bush; 48% Gore ]
John, no ID on me.
Tell that Wall street hack that his question is somewhat odd. All the work
done inside PhysOpt relies on SE or Apollo as a last step for final routing.
Synopsys tell us it's furiously working on its own router. This temp
reliance on SE/Apollo will soon disappear. PhysOpt or PKS is an XOR choice
for users, so PKS hooks are useless for PhysOpt users.
- [ 48% Bush; 48% Gore ]
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From: [ Intel Inside ]
John,
Please keep me anon...
I see a consistent theme w/ timing closure tool selection discussions within
Intel and the rest of the industry. People who are logic designers seem to
love Synopsys's PhysOpt tool. Engineers who live in the physical design
trenches gravitate toward Avanti or Cadence SE. In my experience, anyone
who compares the traditional congestion or net weighting based flows to
PhysOpt/Saturn/PKS will think the later is the greatest thing since sliced
bread. All of these new tools (PhysOpt/Saturn/PKS) work with appropriate
coaxing. Each of them have their own warts and blemishes.
To answer Garo's question - I would argue that more ESNUG readers come
from a logic design background than a physical design background. Hence,
I would expect to hear more cheers regarding Synopsys's tool than those
provided by other vendors. There are not a lot of users out there who
are experts in both the physical and the logical worlds...
Going from my personal experience, I think PhysOpt is weak in solving full
chip integration issues and working with designs that have a lot of custom
hard macros, but from a timing closure issue, it does the job. I feel
the Avanti tools do an excellent job in solving the physical integration
issues and coming to timing closure but are weak in understanding ALL of
the logical constraints the way that a design team intended them to mean.
PKS seems to work in the middle of the group. Does a decent job in both
worlds, but probably not the best choice for just physical or just logic
design.
All three of these tools work. You just need to create a methodology that
fills in the gaps. The funny thing is that most people choose the tool
that works best in their area of expertise and then get stuck closing the
holes in areas where they are more weak. Duh! Well, we engineering types
are not known for having strength in the common sense department - my wife
will vouch for that. I guess it would make sense to do the opposite, but
that goes against human nature...??? (shrug)
Don't expect the vendor to solve methodology issues for you. I have yet to
see one that even makes a decent attempt once the Purchase Order has been
signed. Also, it's really easy to poke holes in the other guy's solution
which is another engineering trait. In the long run, it the engineers that
make stuff work. Meanwhile, I'll just keep plugging along and I don't think
I'll be investing in the EDA world until a "near" nirvana solution hits the
market...
- [ Intel Inside ]
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