( ESNUG 354 Item 6 ) ---------------------------------------------- [6/1/00]
Subject: ( ESNUG 353 #1 ) PrimeTime Finds DC's Design Rule Violations???
> The ideal net command won't overcome the max_transition problem,
> especially when their signals are driven from internal gates. In order
> to run compile -top to fix other things, these bogus problems have to be
> out of the way. I tried set_load 0 on the high fanout net, but that
> doesn't overcome the load of all the input pins attached to the net, so
> the transition time is still outrageous. In order to get around the
> problem, I had to get ugly and resort to "scratch and sniff" techniques.
>
> - Rob Wiegand
> NxtWave Communications Langhorne, PA
From: Wayne Miller
John,
I've also seen problems where DC finishes with no design rule violations,
but then PrimeTime reports max_fanout violations on gated clock networks.
I reported this to Synopsys, and they said they were aware of it.
- Wayne Miller
Standard Microsystems Corporation Long Island, NY
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