( ESNUG 349 Item 12 ) -------------------------------------------- [4/18/00]
Subject: ( ESNUG 348 #11 ) report_power Memory Leak A Power Compiler Issue
> We are using DC 99.10-04 in the Tcl mode and the report_power command for
> power characterization of DW-components for a LSI library. The power
> characterization requires several calls of the report_power command. We
> have found that report_power does not de-allocate memory which leads to a
> program abortion for larger characterization runs.
>
> I have attached a simple DC test script to demonstrate the problem.
>
> # program to demonstrate memory leak produced by report_power
>
> # create module from designware-library
>
> elaborate DW02_mult -arch csa -lib DW02 -update \
> -param "A_width = 4, B_width = 4 "
> current_design
> compile -map_effort medium
> ungroup -all -flatten
> change_names -rules vhdl -hier
>
> # calculate power
> while { 1 == 1 } {
> set_switching_activity -period 10 -toggle_rate 0.7 [all_nets]
> report_power }
>
> One should start the script and observe the memory requirement to see that
> already for this small component each report_power command requires some
> more Mbytes of additional memory.
>
> - Gerd Jochens
> OFFIS Research Institute Oldenburg, Germany
From: [ A Synopsys Power Compiler CAE ]
Hi John,
Gerd pointed out a problem with memory allocation when he repeatedly used
the report_power command in Design Compiler version 1999.10-4. The
report_power command is actually a Power Compiler command.
The problem is Power Compiler utilizes memory each time the report_power
command is used, and it does not release the memory that it uses to do the
report_power command.
This improper memory handling is somehow attributable to Gerd's
synthetic_library variable setting. It happens when the synthetic_library
variable is set to ALL of the DesignWare Foundation (DWF) libraries.
We, the Power Compiler Team at Synopsys, are investigating the problem
(reported STAR-101169), and will fix it as soon as possible. Our current
advice is to limit the synthetic_library setting to only the DesignWare
Foundation libraries (as Gerd suggests) that are needed for that design.
- [ A Synopsys Power Compiler CAE ]
---- ---- ---- ---- ---- ---- ----
From: "Joerg Landmann" <lama@de.xionics.com>
Hi, John,
Another option would be to include the "dw_foundation.sldb" which contains
all the DesignWare foundation libraries. We haven't found a problem with
this approach.
- Joerg Landmann
Xionics GmbH Germany
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