( ESNUG 343 Item 7 ) --------------------------------------------- [2/16/00]
Subject: ( ESNUG 342 #9 ) We Quickly Switched From Fastscan To TetraMax
> We've recently run TetraMax on a complex 3 million gate design that is
> already in production. The original set of vectors (30 million) had been
> generated using Synopsys TestGenXP (formerly Sunrise). We used to run
> TestGenXP ATPG distributed over a dozen hosts, resulting in about 3 days
> CPU time (more than one month on single CPU!!!). We did the same with
> TetraMax and the results have been quite astonishing: 4 days on a single
> CPU only, producing *half* the vectors w/ a negligible coverage
> reduction (about 1%).
>
> - Roberto Mattiuzzo
> STMicroelectronics Agrate, Italy
From: tturner@broadcom.com (Tony Turner)
Hi, John,
We have just completed 3 chips with over 2 million gates each. We tried
Mentor's Fastscan and TetraMAX in the beginning and quickly switched to
TetraMAX.
The first reason for switching was the libraries used by Fastscan are not
the same as the Verilog libs. So we spent a lot of time chasing small
library issues. TetraMAX however uses the same Verilog libs as our chip
sims -- this alone was enough reason to go with TetraMAX.
Then after using the tool for a while, the graphical debug of blocked
chains and uncontrollable nodes was so much better than the cryptic error
messages other tools give. As for speed, the longest it takes to get a full
set of patterns is 12hrs. On small blocks (100K gates) if you are debugging
something, you can have a Verilog simulatable set of patterns in 20 mins.
Got some cells with unreliable capture? Mask them in the tool -- don't use
tester time to do it. Have tons of ram blocks or non-scan custom cells?
Just use black_box -- no need to build any models. This is the way EDA
tools are supposed to be done -- too bad it took till the 21st century to
get there.
- Tony Turner
Broadcom Corp.
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From: Danilo Grassi <Danilo.Grassi@accent.it>
Hi, John,
Here are my impressions of Synopsys TetraMAX ATPG. Previously I have
been a Sunrise/Synopsys testgen user. And I have noticed the enormous
reduction of design compilation and test generation runtime when using
tmax. But this is not the only thing that has really impressed me.
Other tools have similar capabilities. I worked on a design with a
lot of problems in resolution of internal tristate buses when generating
ATPG patterns. I tried with three different tools, and TetraMAX was the
only one that was able to generate test pattern in a very simple way,
with a very short runtime, without bus resolution conflicts and obtaining
the best test coverage result.
- Danilo Grassi
Accent S.r.l. Vimercate (MI), Italy
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