( ESNUG 339 Item 4 ) --------------------------------------------- [1/13/00]

Subject: ( ESNUG 335 #2 338 #6 )  DC/PT 3-D Load-Dependent Lookup Tables

> Synopsys version 1999.10 supports 3-dimensional lookup tables for delay
> modeling.  I hope to find out what other tools (e.g., Avanti, Cadence,
> etc.) already have or plan to have compatible timing modeling.  What have
> you heard from your vendors?  Are there characterization tools out there
> that can write .lib's with this syntax?
>
>     - Andy Pagones
>       Motorola Labs


From: Stefan Scharfenberg <Stefan.Scharfenberg@motorola.com>

Hi John,

Please allow me to comment on the 3-D Lookup Table discussion.  I think Andy
made a good point and the Synopsys Library Compiler CAE's reply answers this
to a certain extend.  What I always find difficult when creating libraries
is to find out how are certain ways to model the library or certain
constructs impacting other tools?  The Synopsys .lib has become a very
popular format which can be parsed by many tools (from Synopsys and other
vendors).  Along with this development additional commands and constructs
like the 3-D tables were added.  These are very well described in the
Library Compiler Manuals, what is missing is a list or table of tools that
can read this information and actually use it in a meaningful way.  Let me
give an example.

  /* Library defaults */
     slew_lower_threshold_pct_rise : 20.00 ;
     slew_upper_threshold_pct_rise : 80.00 ;
     slew_derate_from_library      :  1.00 ;
     input_threshold_pct_fall      : 50.00 ;
     output_threshold_pct_fall     : 50.00 ;
     input_threshold_pct_rise      : 50.00 ;
     output_threshold_pct_rise     : 50.00 ;
     slew_lower_threshold_pct_fall : 20.00 ;
     slew_upper_threshold_pct_fall : 80.00 ;

The above lines are only meaningful to PrimeTime.  There is no hint to this
in any documentation that I looked at, so a user may have the impression
that all Synopsys tool understand this.

    - Stefan Scharfenberg
      Motorola SoCDT                                Munich, Germany

         ----    ----    ----    ----    ----    ----   ----

> I'm the Library Compiler CAE.  Since Andy brought this up, I would like to
> give a brief history of 3-D timing modeling plus some recommendations.
> We've had a lot of experience at Synopsys modeling unbuffered outputs.
> 
> In the early days of DC, we modeled one output dependent on output loading
> another output, but no output-to-output timing arcs.  Many people use this
> today, though fewer & fewer libraries heavily leverage unbuffered outputs.
>
> A few years ago we added setup & hold constraint 3-D tables.  Some vendors
> requested them and 3-D constraint tables are generally used when we have
> load dependant constraints.  Setup/Hold depends on loads on both Q & Qbar.
>                              ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>     - [ The Synopsys Library Compiler CAE ]


From: [ Made In Taiwan ]

Hi, John.  Anonymous, please.

I am wondering how this can be true: "Setup/Hold depends on loads on both Q
and Qbar." from the SYNOPSYS CAE' statment.

For DFF's, we see a master/slave architecture.  Otherwise, it is a LATCH.
So, the setup time of a DFF should not be affected by LOADING, since the
loading is blocked and afftected only the slave stage.

Can anybody tell me what I am missing out ??

    - [ Made In Taiwan ]



 Sign up for the DeepChip newsletter.
Email
 Read what EDA tool users really think.


Feedback About Wiretaps ESNUGs SIGN UP! Downloads Trip Reports Advertise

"Relax. This is a discussion. Anything said here is just one engineer's opinion. Email in your dissenting letter and it'll be published, too."
This Web Site Is Modified Every 2-3 Days
Copyright 1991-2024 John Cooley.  All Rights Reserved.
| Contact John Cooley | Webmaster | Legal | Feedback Form |

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)