( ESNUG 326 Item 10 ) --------------------------------------------- [8/25/99]
Subject: No, Metastability 'Z' Doesn't Pass Through Disabled Logic Gates
> Will metastabily propagate through logic gates even when they are disabled?
> That is, assume I have an AND gate, with two inputs A & B. Input A is a
> signal with a posibility of being in metastable state. (Say, it is the
> output of a flip flop which has an asynchronous input). Now if I make
> input B at logic zero, during the possible period of A being at metastable
> state, what will be the output of this AND gate? Or the question is as
> simple as, if one input of an AND gate is a metastable input and other
> input is a logic zero, what will be its output? What if it is an OR gate
> with the other input at logic one?
>
> - Rejeesh
From: Jari Mutikainen <jari.mutikainen@tellabs.fi>
No Rajeesh, metastability can't propagate like that through disabled gates.
If you have a '0' at one input to an AND, the output of it is going to be
'0' regardless of the other input(s) of that gate. Similarly you can can
count on the output of a OR-gate being '1' as soon as you have one '1' at
some of the inputs.
- Jari Mutikainen
Tellabs Finland
---- ---- ---- ---- ---- ---- ----
From: Kuba Smieciuszewski <kuba@fnc.fujitsu.com>
AND gate A B OUTPUT
H H H
L X L
X L L
OR gate A B OUTPUT
L L L
H X H
X H H
- Kuba Smieciuszewski
Fujitsu Network Communications, INC
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