( ESNUG 322 Item 3 ) ---------------------------------------------- [6/15/99]
From: Ron Collett <ronc@collett.com>
Subject: Collett's Take On The Current North American Verilog/VHDL Market
John,
Let's move the discussion forward and talk about the role of the two
languages in the core of the North American IC and ASIC design markets:
computers, communications and semiconductors. While it's not our usual
style to disclose research findings to public audiences (otherwise, there
are no $Millions to be earned, real or imaginary), you've stirred a debate
and I'd like to contribute with results from a recent study. In these chip
design markets, Verilog is clearly the dominant modeling language with 67
percent of design teams using it in North America. VHDL, however, is
holding its own in these markets in North America, with 37 percent using
it. Worthy of note is that a 16 percent of these teams use BOTH languages
in the same design project. And 17 percent use neither Verilog nor VHDL.
I think that we've reached detente. The "hard core" Verilog users (i.e.
use only Verilog) represent about 46 percent of this industry group and
the staunch VHDL users (i.e. use only VHDL) represent 21 percent. That's
the way it is today in these market segments -- but in the defense and
aerospace market, the industrial control market, medical electronics and
other market segments, the story is different.
As for trends, I don't think it's an issue. Both languages are here to
stay, and the discussion will rapidly move on to whether C, C++, C2,
extended Verilog, VHDL or SLDL or some other language will prevail in
the next generation of "advanced design."
- Ron Collett
Collett International Santa Clara, CA
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