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From: Rajen Ramchandani <rajen@jaxom.eng.pko.dec.com>
Subject: CiscoFSM Not For Commercial Designs. Are There Any Similar Tools?
John,
I will be designing a couple of very big and complex state machines in our
next ASIC. I was planning on doing some paper design, i.e state diagrams
and then jumping in and coding Verilog. I was wondering if folks had any
suggestions for tools or techniques that can be used to ease the design
and especially the verification task.
I am aware of the free tool from Cisco that takes Cisco stylized Verilog and
generates bubble diagrams and helps in debug -- but the license agreement
says that this cannot be used for commercial products. Are there any other
tools that are worth looking into?
- Rajen Ramchandani
DEC / Compaq
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