( ESNUG 304 Item 9 ) --------------------------------------------- [11/12/98]
Subject: ( ESNUG 303 #2 ) Variable For Annoying Buried Translate_off's
> I encountered the following code in a VHDL file I wanted to run through
> Synopsys:
>
> -- synopsys translate_off
> library IEEE;
> use IEEE.VITAL_Timing.all;
> -- synopsys translate_on
>
> However, when I tried to actually use this code, I got the following:
>
> Error: The package 'VITAL_Timing' depends on the package
> 'std_logic_1164' which has been analyzed more recently.
> Please re-analyze the source file for 'VITAL_Timing' and
> try again. (LBR-28)
>
> The Magic Synopsys Variable (tm) to get around this is to do a:
>
> hdlin_translate_off_skip_text = true;
>
> BEFORE you compile the "untranslated" code.
>
> - [ Kenny from South Park ]
From: miller@symbol.com (Wayne Miller)
Hi John,
I'm not so sure I agree with Kenny's solution. If you check the time
stamps on the IEEE std_logic_1164, Vital_Timing and VITAL_Primitives
packages, you'll see that the files are really out of date (.sim and
.syn). This is a software release problem that Synopsys has finally
admitted to in the 1998.02 and 1998.08 releases. They have posted a
fix for this on SolvNet, but I wouldn't recommend it. It should be
fixed in the next VSS release (?April '99?), not in the DC release
scheduled for February '99.
- Wayne Miller
Symbol Technologies, Inc.
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