( ESNUG 297 Item 2 ) ---------------------------------------------- [7/30/98]
From: [ "Stanley Tweedle, 4th Level Security Guard" ]
Subject: WATCH OUT! -- Synopsys Test Compiler Gives BAD Coverage Numbers
Hi John,
Please keep me anonymous.
I generated scan vectors using Test Compiler and it reported a 94% coverage
number. I thought to myself what better pattern to collect characterization
data on the pins than a pattern the supposedly should drive or compare on
just about every pin. What I did was run the scan pattern generated by Test
Compiler on a tester and vary the input levels on the inputs and inouts to
see what the Vih and Vil numbers were for the pins. Some of the pins were
reported with no minimum or maximum Vih or Vil which means these pins do not
effect the compare results in the pattern. I also ran the pattern and looked
at the output levels to find Voh and Vol.
Some of the pins were reported as having no minimum or maximum Voh or Vol.
This means that these pins are not compared in the pattern. The pins that
were reported as not effecting the pattern or being compared in the pattern
were always inouts. Some of the uncovered inouts were part of a bus where
6 out of 8 pins were covered.
This wouldn't have been very interesting except I decided to look in the
Test Compiler fault list to see if these pins that the tester said were
uncovered were reported as tested or untested.
To my surprise most of the missing pins were reported as tested by the
scan pattern!
I thought that there may have been a problem in the vector conversion
process so I looked at the TSSI-ASCII, TSSI-WGL and verilog files output
by test compiler and there was no place in these patterns that the pins
reported by Test Compiler as being tested were actually tested.
I decided to run an experiment to see what the coverage number was if the
missing pins were treated as unconnected since this is how the test vectors
treated them. The test coverage dropped to 87%.
This situation is rather alarming to me because the test coverage number
reported Test Compiler is assumed by me ( and probably others ) to be
accurate, but my experiment showed that this is not the case.
I have read the Synopsys Test Compiler documentation and looked at Solvit
notes but I couldn't find any mention of the problem I am having.
Has anybody else ever seen this type of thing? Has anybody else even tried
this simple experiment to see if they get similar results?
Please keep me anonymous.
- [ "Stanley Tweedle, 4th Level Security Guard" ]
|
|
