( ESNUG 296 Item 10 ) --------------------------------------------- [7/23/98]
From: Robert Cooney <rcooney@net.com>
Subject: Cooley's Recommendation Of "HDL Chip Design" Ain't Worth Crap!
Dear John:
I remember reading your column in February in the EE Times. In this column
you gave a great many kudos to the book "HDL Chip Design". Recently, I have
been using this book in conjunction with others to learn VHDL. I must tell
you I am less than satisfied.
From a purely mechanical standpoint the book does not appear well
constructed. I have only been using this book for about 2 months and it
is already falling apart. Pages are coming out of the book already.
From an accuracy point of view I also find it troublesome. On a number
of occasions I have taken VHDL code directly out of the book. The result
is that the code does compile correctly but the intended action is
incorrect. Specifically a good portion of the code for generating clock
waveforms for test harnesses does not generate waveforms.
You wouldn't have made any money by mentioning the book in your column,
would you?
- Robert Cooney
NET
[ Editor's Note: Sadly, Robert, I have to report that I made *no* money off
of that book review. Nada. Zero. Zippo. And To make it worst, I wasn't
even *offered* anything for it. No bribes, no kickbacks, nothing! I'm not
exactly sure what I'm doing wrong here $$$-wise, but, alas, it means I
stupidly wrote that column purely as my own opinion. Oh, well. - John ]
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