( ESNUG 296 Item 5 ) ---------------------------------------------- [7/23/98]
From: Yaron Kretchmer <yaron@lsil.com>
Subject: Multibit Register Inferrence Problems
John -
While inferring multi-bit-registers in 1998.02, I stumbled across the
following problem:
Synthesis of a multi-bit component (a register back, in my case) takes
FOREVER -- for instance, an 128 bit flop bank is mapped to "normal" 1-bit
flops in less then 30 seconds, but can take several hours for multi-bits.
In the library there are a LOT of multi-bit cells (1-64 bits wide), which
seems to be the problem, but using the "undocumented magic variable"
< mbm_filtered_pack_per_cell_best = 1> does not help.
Any ideas?
- Yaron Kretchmer
LSI Logic Ramat Hasharon, Israel
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