( ESNUG 286 Item 6 ) ---------------------------------------------- [4/13/98]
From: wsnyder@world.std.com (Wilson Snyder)
Subject: A "Snyder"-fied Version Of McNamara's Verilog-Mode EMACS
Hi, John,
I'd like to announce a new version of Michael McNamara's verilog-mode for
Emacs. I've added some inline preprocessing features that are major time
savers for Verilog coders. This mode will expand a nice compact Verilog
program like:
module example (/*AUTOARG*/);
input i;
output o;
/*AUTOINPUT*/
/*AUTOOUTPUT*/
/*AUTOREG*/
inst inst (/*AUTOINST*/);
always @ (/*AUTOSENSE*/) begin
o = i;
end
endmodule
To what the tools really require:
module example (/*AUTOARG*/
// Outputs
lower_out, o,
// Inputs
lower_in, i
);
input i;
output o;
/*AUTOINPUT*/
input lower_in; // To inst of inst.v
/*AUTOOUTPUT*/
output lower_out; // From inst of inst.v
/*AUTOREG*/
reg o;
inst inst (/*AUTOINST*/
// Outputs
.lower_out (lower_out),
// Inputs
.lower_in (lower_in));
always @ (/*AUTOSENSE*/i) begin
o = i;
end
endmodule
With the end result being that modules that instantiate other modules can
be constructed almost automatically, and be updated when a lower module
needs a new signal with only two keystrokes.
The best thing is that you can toggle between expanded and unexpanded, and
see exactly what is happening right inside Emacs. You don't have to change
any methodologies, since the expanded form is what is saved. And if it
doesn't do what you want, you can edit what it creates and just remove the
magic comments.
I'll take suggestions and make fixes as I can. But of course, you get what
you're not paying for. (I should specifically warn that the parsing is
trivial; it is based on regular expressions so complex constructs probably
won't work. Also AUTOINST works best with the one-module-per-file
methodology.)
For the code, see Mac's http://www.surefirev.com/resources.html
- Wilson Snyder
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