( ESNUG 276 Item 6 ) ----------------------------------------------- [1/7/97]
Subject: ( ESNUG 275 #9 ) DC Putting Delays On Flip-flop Feedback Lines
> Another problem we have noted here is Synopsys putting in delay lines on
> flip-flop feedback lines when using clock uncertainty. To get around this
> problem, an engineer here proposed adding the following script:
>
> foreach(dummy, all_registers()) {
> set_false_path -hold -from dummy -to dummy
> }
>
> and then compiling incrementally.
>
> This appears to produce the desired results on small files, but causes
> large ones to spin, more or less, forever. For now, we have decided that
> we can live with those extraneous delay lines.
John,
One word of warning to using this approach.
Every point-to-point timing exception significantly increases compile time.
Use timing_self_loops_no_skew (remember those MAN pages?)
- Jeff Buckles
NEC
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