( ESNUG 275 Item 3 ) --------------------------------------------- [12/17/97]
Subject: How To Integrate Design Compiler Output To MAGIC Layout
> I am looking for ways to integrate Synopsys synthesis resuults with
> MAGIC. Any info regarding this will be appreciated.
>
> - Junaid Ahmed Zubairi
> International Islamic University Malaysia, Kuala Lumpur, Malaysia.
From: lager@cam.org (Athmane Lager)
Hi Junaid
For a layout in a standard cells way(raw of cells), and if the synthesised
result is in structural VHDL, you can use the MSU library(public domain and
magic layout). You must have two tools: SIS and OCTTOOLS from UCB(Berkeley).
1 -use vst2blif: structural VHDL to Berkeley Interchange Format
2 -read the resulting blif file with SIS
3 -map it to MSU library with SIS
4 -store the mapped file in octtools format
5 -use TimberWolf from the OCTTOOLS for the place and route
6 -use oct2mag to convert your layout from octtools to magic format.
Good luck.
Athmane Lager
Silicon Compiler
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